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DS90UB947-Q1: figured screen problem at room temperature

Cary Wang
Intellectual 580 points

Part Number: DS90UB947-Q1

Dears:

We had a figured screen (thin vertical bar) problem  while system power-on at room temperature.  (  SOC-DS90UB947-----DS90UB948-LCD)

Disconnected  the lines between 947 and 948, the system reinitialize 947 and 948. Screen display normal.

We read the registers of 947 and 948. There are some differences between screen figured and normal status , as follows, please help to analyze.

1. These registers are not configured in our system. They are read-only or unpublished registers. What will lead to the values changes of registers?

2. From the function of registers, it can be ascertained that the problem of figured screen is caused by the change of parameters. 

3. Please provide the functions of reserving registers.

947 inconsistent registers: 0x0a, 0x0c, 0xc5

948 inconsistent registers: 0x3b 

 

0x0a: 0x12 vs 0xAE - CRC Errors, ReadOnly

0x0c: 0x07 vs 0x17 -- Gernal Status, ReadOnly, High 4 bits Reserved 

0xc5:0x00 vs 0x38 -- Undisclosed Registers 

0x3b: 0x05 vs 0x00 -- Undisclosed Registers

  • 0
    TI__Mastermind 30515 points

    Hi, pls check below comments on your questions.

    1. These registers are not configured in our system. They are read-only or unpublished registers. What will lead to the values changes of registers?

    -> 0x0a/0x0c is on link error. Due to instable system during the power-on, sometimes the link would report the error. so it is normal that your link after power-on has error. you can read and clear these error and read again, if it still has error, it means your link has bit error. you need improve the high speed serial link design robust to remove the link error.  (0x0c)

    Link Lost Flag for selected port:
    This bit indicates that loss of link has been detected. This register bit will stay high until cleared using the CRC ERROR RESET in register 0x04.

    0x3b is receiver equalizer status, which also is dependent on the link stability. if the link loss is large, this EQ value would be high.

    2. From the function of registers, it can be ascertained that the problem of figured screen is caused by the change of parameters. 

    -> not, it can't. as mentioned, these register is on the status after power-on, and it would be changed in some extends. For your issue, what is the "thin vertical bar"? sorry we can't understand it.

    3. Please provide the functions of reserving registers.

    -> 0xc5 is on HDCP, it is not used in your UB device. 0x3b is on EQ status in receiver side,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 580 points

    Dear Steven,

    Thanks for your help.

    Can we use below  retry mechanism to avoid flower screen problems:

    Clear error feedback by configuring 0x04, and then read 0x0a and 0x0c to verify errors.

    Or are there any other registers that can be joined to the retry mechanism ?

    Is there any document  about how to  avoid flower screen?

  • 0 in reply to Cary Wang
    TI__Mastermind 30515 points

    Hi cary,

    1. the reg. 0x04, 0x0a, 0x0b just indicates if the link has bit error not, it can't resolve the bit error.

    2. as mentioned, please check whether the link has bit error after you clear the error record in reg. 0x04, 0x0a, 0x0b? if it still have bit error, please check the serial link jitter margin design. any unlock in ub948 side?

    3. what is the "flower screen"? and how about the failure rate? what is the PCLK freq.? is it dual OpenLDI input in UB947 side?

    best regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 20 points

    Dear Steven,

    Thanks for your help.

    1，OK，understand！

    2，Yes，it has no error after clear 0x04

    3，the failure rate about 1‰，it difficult to reapper，PCLK=95.2MHz，single OpenLDI input 947，and dual OpenLDI 948 output。

  • 0 in reply to user6143345
    TI__Mastermind 30515 points

    Hi,

    for your issue, please make sure that the error is clean after power-on. if the link still has issue, please past the picture/video to better understand the possible reasons. also, you can check:

    1. when issue is reported, running the pattern test with internal and external, in ub947 and ub948 side respectively, are they all ok?

    2. when issue is reported power down and power on 948, does it recover?

    3.when issue is reported power down and power on 947, does it recover?

    4. power off and power on the total panel is it recovered?

    we can identify the possible reasons in your link better.

    regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 20 points

    Dear Steven,

    Thanks for your help.

    Yes,the fist time power on (display ok) ,and don't clear 0x04,read reg 0x0a and 0x0c from 947 direct,it will some crc
    errors,(eg.0x0a=0d/0f...,0x0c=07),then clear 0x04 and read 0x0a and 0x0c again,it will no crc errors,0x0a=00,0x0c=05。
    Last time it occured mix color ，we didn't try to clear 0x04。We will try it next time while it report 。
    1，OK,we would running the pattern test while it reporte.
    2，the first time it occured mix color ，we power down 948 and disconnect 947/948 link，then connect link and power on 948
    ，it recovered，the display is OK.
    3,We did not power down and on 947 last time,but I think it woulk be recovered.
    4,Yes,it will be recoverd,I think it looks like issue 2.

  • 0 in reply to user6143345
    TI__Mastermind 30515 points

    Hi,

    For the 4 item, I means you just power off the panel NOT including the 948 board, can it be recovered?

    also, may I know it is single FPD-Link or dual FPD-Link channels in your case? can you monitor the LOCK pin in UB948 side?

    best regards,

    Steven