TCA9555: Internal POR & Glitches

Go Bravos said:

Part Number: TCA9555

Team,

There are a few tables and descriptions concerning the internal POR and glitches, could you provide further information or guidance concerning the following questions?

1. Page 29/30 of the PDF of the datasheet http://www.ti.com/lit/ds/symlink/tca9555.pdf says that glitches in the power supply can also affect the power-on reset performance of this device. Can you comment on the state of the outputs of the device assuming that the device experiences a glitch that is considered in the functional disruption range?
   The glitch that I am aware of is the potential for the device to start up with the registers set to a value other than the default values.
2. Page 16, 9.4.1 describes the power-on sequence of the device holding the outputs in a reset state.

1. Are all output states held until the device’s VPROF threshold is met during power ramp-down?
   The device is meant to be held in reset prior to Vcc hitting PORR. The device's pins should be in a high impedance state.
2. What happens to the output states between VPROF and 0V during the power-down?
   Eventually everything would just become high impedance, prior to that it would be whatever the previous state of the pins were.
3. What happens to the output states if a glitch is encountered (described in question 1) during 2.a, between VCC and VPROF?
   If you are between Vcc and VPORF then the device is still powered and you would not see any change.
4. What happens to the output states if a glitch is encountered (described in question 1) during 2.b, between VPROF and GND?
   If you are between VPORF and GND what you will likely see is the device's pins will hold their states (wither HI-Z, driving HIGH, Driving LOW) until the device gets into its reset state where everything should become HI-Z. I imagine this to be about 1 microsecond by looking at table 9.

• Is there any condition other than a power glitch described on pages 29 and 30, that would result in unknown output states of the device?
  There have been posts on e2e of a customer experiencing problems when sending high frequency sine waves into the SDA/SCL pin while communicating (if memory serves they were trying to do some kind of EMI testing). Other things I have seen was someone doing ESD strikes on Vcc (away from our device) causing the device's registers to power up in correctly (likely due to EMI emitted from the strike itself).
• The default state of these I/O appear to be inputs. Is the 100K Ohm resistor on Page 17 present during power-up?
  I measured a device I had on hand and looked at an internal design schematic and it seems like the 100k pull up resistor is there (internal schematic shows there is a bond option but I'm not sure where the bond would go.

1. 1. Does the device have to receive valid commands prior to being configured for outputting on each port?
      Assuming a good PoR, yes the device would need to be configured to be an output otherwise it would be an input (biased weakly to Vcc with a 100k pull up).
   2. Once default states are established, if a power glitch occurs, will the outputs return to the default states, or be reconfigured as inputs, or does it depend on the type of glitch that may have occurred?
      You would need to power off the device and power the device back on with a good Vcc ramp in order to insure the default states are correct.
   3. During a ramp-down with no power-down sequence glitch, do the I/O transition from the configured output --> to the default state defined --> input with 100K --> and finally no-operational?
      To be clear, I've never seen a problem with the device during or after a ramp-down. The glitch which I have seen is the default values of the internal registers are not correct AFTER a bad power up. A bad Ramp down or a down ramp that does not reach GND and stay there long enough then a bad power up can cause the problem I stated in the previous sentence. The answer to this question now is, the output stage would probably be on for a little bit, then as VDD discharges the device would likely start to reference Vcc through the pull up resistor until it fully powered down.

Thank you.