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DP83848K: Packet error occurs when cable connected while both side DP83848K are working

Toshihiro Watanabe
Genius 10235 points
Part Number: DP83848K

Hello,

We are using DP83848K as below connection.

DP83848K -> Ether cable <- DP83848K. 

[observed situation]

No packet error occurs In the cable connection condition,

When cable is disconnect once then connected again, packet error occurs. The error ratio is roughly one per 1000 packet.

While packet error is occurring, power cycle did, packet error is gone.

[Question]

 1) Did DP83848K report this packet error issue when cable attaching?

 2) We want to know DP83848K status and setting. Would you let us know how we can know internal status or setting? We are guessing equalizer might not be setting correctly due to cable attached noise.

3) What is the reason thinkable of this issue? Please let us know what is the possibility to make this issue.

Best regards,

Toshihiro Watanabe

  • 0
    TI__Mastermind 26320 points

    Hi Toshihiro-san,

    On disconnecting and connecting the cable, the Negotiation is triggered and then link-up happens. We don't expect to have difference in behaviour or packet errors.

    1. At which layer you are observing the packet errors ?

    2. You check register 0x0015 of DP83848 which indicates recieved packet error count.

    3. Also, do you continue to have 1/1000 packet error even if system is kept running for long ( say 5-10 minutes) ?

    Regards,
    Geet

  • 0 in reply to Geet Modi
    TI__Genius 10235 points

    Hello Geet-san,

    1. At which layer you are observing the packet errors ?

       -> We saw register 0x0015 and see packet errors in this register.

     2. You check register 0x0015 of DP83848 which indicates recieved packet error count.

       -> As mentioned 1, we are seeing register 0x0015.

    3. Also, do you continue to have 1/1000 packet error even if system is kept running for long ( say 5-10 minutes) ?

      -> yes, error is continuously occurring we wait long.

    Is it possible we can know the internal EQ setting or internal setting of DP83848?

    We expect EQ setting becomes incorrect value when link-up because OPAMP in Tx and resister divider in RX path for longer cable distance support.

    We expect these components may affects the internal setting so we would like to know the internal setting value.

    Best regards,

    Toshihiro Watanabe

  • 0 in reply to Toshihiro Watanabe
    TI__Genius 10235 points

    Hello Geet-san,

    I am not clear how DP83848K determines EQ value, what measured data is used for decision. Would you let us know how to do it?

    Best regards,

    Toshihiro Watanabe

  • 0 in reply to Toshihiro Watanabe
    TI__Mastermind 26320 points

    Hi Toshihiro-san,

    Aniruddha is supporting you offline. I am closing this thread.

    Regards,

    Geet