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DP83867IR: 1000Base-T IEEE802.3 Ethernet Compliance Test failed

g.f.
Guru 15520 points
Part Number: DP83867IR

Hi,

Our customer are using DP83867IR on their development board and
having an issue during IEEE 802.3 Ethernet Compliance test of 1000Base-T.

The test are failing at following section:
[1000 Base-T, Difference A,B Peak Output Voltage(w/ Disturbing Signal)]
[1000 Base-T, Point F Template Test(w/ Disturbing Signal)]
[1000 Base-T, Point H Template Test(w/ Disturbing Signal)]

Please take a look at attached file for the details.

Customer IEEE802.3 Ethernet Compliance Test Result.pdf

On the customer board, they are using RJ45 which magnetic's each center tap were
decoupled to the GND via 0.1uF independently.
And we check the schematics but it seem there no problem.
Also, we are following to the application report
"How to Configure DP838xx for Ethernet Compliance Testing",but it's failing.

We are searching for the cause of the failures, but we are stuck and no workaround are found yet.

What kind of problem can be considered against these test failure?
And what should we check to solve this test failure? Any advise will be helpful.
If possible, could you please check the customer's layout and schematics to find the issue?

This issue is similar to the following E2E thread.
e2e.ti.com/.../809921
In this thread, it was solved by updating the version of oscilloscope.
But we tested by using several different supplier's oscilloscope but it still fails.
So, it seems it's not oscilloscope problem.

best regards,
g.f.

  • 0
    TI__Mastermind 18425 points

    Hi g.f.,

    Yes, please share the schematics along with details about the magnetics and the reference clock input. Also has the customer implemented extended register space access in order to write to the registers of the PHY?

    -Regards

    Aniruddha

  • 0 in reply to Aniruddha Khadye
    Guru 15520 points

    Hi Aniruddha,

    Thank you for the reply.
    We would like to share the schematics and the layout with you
    but we aren't allow to attach the file to this forum.
    Could you send me your e-mail address to send the file?

    On their board there are two DP83867IR(PAP package)
    and they are using following 2 port(Upper/Lower) RJ45[0845-2R1T-E4]:
    belfuse.com/.../0845-2R1T-E4.pdf
    If the two DP83867s on the board are exchanged with each other,
    the test failing problem seems to be dependent on the PHY.
    Could you please take a look at the attached file for the details:

    Compliance test result of swapping the PHY.xlsx

    The reference clock(25MHz) for DP83867IR is following:
    ABM8-25.000MHZ-B2-T
    abracon.com/.../abm8.pdf

    >Also has the customer implemented extended register space access in order to
    >write to the registers of the PHY?
    Yes, they implemented extended register space access following the
    DP83867IR datasheet page.34 "8.4.2.1 Extended Address Space Access".

    best regards,
    g.f.

  • 0 in reply to g.f.
    Guru 15520 points

    Hi Aniruddha,

    Could you please reply to my above post?
    This compliance test failure need to be solved as soon as possible.
    I'm sorry for sending such a post and making you in hurry, but we really need your help.

    best regards,
    g.f.

  • 0 in reply to g.f.
    TI__Mastermind 18425 points

    Hi g.f., 

    I sent a connect request over E2E so that you can send your schematics over private chat

    -Regards

    Aniruddha

  • 0 in reply to Aniruddha Khadye
    Guru 15520 points

    Hi Aniruddha,

    Have you receviced my message and schematics from private chat?
    If you have received, do you have any updates?

    best regards,
    g.f.