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TL16C2552: About MCR bit3 register.

Kengo.Y
Guru 11265 points
Part Number: TL16C2552

Hi team.

Our customer are replacing PC16552 to TL16C2552 .

We understand the difference is the MCR bit3 between them.

According to datasheet at p.23 and p.28.

On p.23, it is written 'Parity Enable'

On p.28, it is written 'Bit 3: This bit (OUT2) controls the high-impedance state output buffer for the INT signal and the OP output.'.

Is it correct TL16C2552's MCR bit3 is interrupt ?

And then,

If PC16552' MCR bit 3 is High, what does it do?

Sincerely.
Kengo.

  • 0
    TI__Guru 53575 points

    Hi Kengo,

    In the datasheet for TL16C2552 Table 3 on p.23 shows Bit 3 of the MCR controls "INT Enable, OP Control". When this bit is high, the INT signal is enabled (allowing interrupts) and /OP is low (AFR[2:1] are both low).  "Parity Enable (PEN)" is controlled by Bit 3 of the LCR.

    When PC16552 has Bit 3 in its MCR controls /OUT2 which is an auxiliary user-designated output. When Bit 3 is set to logic 1, /OUT2 output will be fored to logic 0.

    Let me know if this helps.

    Regards,
    Eric