Hi Team,
I have a customer with a question about the TUSB2046B
We have finished our test boards and are making our first attempts. At first, nothing worked reliably. As a cause we could identify the reset circuit. In our setup, the TUSB2046 should be powered on by either a host controller or another hub. For this we use the "Power Enable" output of these devices (3.3V == Device should be on). The TUSB2046 seems a bit sensitive to the reset. If I interpret the data sheet correctly, \ Reset should initially be high at Power-Up. As soon as 90% of Vcc (3.3V) is reached, the reset for 100us to 1ms should be pulled low. Such a thing is difficult to implement without special reset logic, especially if a reset in operation should be possible. At e2e.ti.com/.../476641 I found an explanation that the device needs at least 100us for the reset to be detected. It should not be more than 3ms, otherwise the USB enumeration could cause problems. However, we still have problems here because the 1k5 are permanently connected to DP0. We would like to do the following: 1. Connect a 10k pull-down to the reset. This ensures during the power-up that the block does not start in a defined manner 2. Connect the reset directly to the "Power Enable" line. Since this is activated at startup much later than the Vcc, the sequence should fit 3. Connect the 1k5 to DP0 not with Vcc but with "Power Enable". This will ensure that the host does not try to enumerate until the reset is released (and not before). In our tests, the circuit worked so well. It is not as described in the datasheet. Do we see any reason why we shouldn't use this solution?
Regards
Mihir
