Hi Team,
When looking at CLK1 and CLK2 at the output of the 948, how closely should those two match each other? Say for example the PCLK for the display should be 150MHz, should CLK1 and CLK2 always be divided perfectly evenly, giving 75MHz for CLK1 and 75MHz for CLK2. Or is there some variation where CLK1 can be 77MHz and CLK2 can be 73MHz?
Is there a certain tolerance of accuracy for their division?
Thank you,
Jared