Other Parts Discussed in Thread: TCA9539
Hi Team,
My customer is seeing some strange behavior on TCA9539-Q1 regarding multiple I2C reads and we are not sure what is going on.
Here's the rundown of their board:
- 400KHz I2C bus w/ 1.5K pull-up on SDA, SCL
- Overall bus capacitance of ~90pF
- We have 4 TCA9539 devices all on different addresses (A0-A1)
- Address pins are tied hard to their respective rails
- Rails remain stable during operation (i.e. bus dips are <<Vcc_GH)
- Reset pin remains stable during operation
- Slowing down I2C to 100KHz makes the issue more frequent!
- The issues are consistent across boards
- Assigning output duties to a different TCA device causes the I2C issue to follow that device- i.e, the issue is not confined to a particular IC but rather the function the IC is assigned.
- The other 3 TCA devices are configured as inputs and do not have problems.
Here's what they are observing:
Our software executes the following in a loop:
- Read PORT0 config (address 0x06) from device 0x77
- Read PORT0 output (address 0x02) from device 0x77
- Write PORT0 output (address 0x02) from device 0x77
This transaction succeeds for a while (thousands of transactions) and suddenly fails where the slave NACKs its address. Our master delays 20us and retries 3 times before giving up. The slave NACKs all 3 times. If we continuously retry, the slave will suddenly begin to respond after some 20-50 retries. If we remove step 1 and only execute actions in steps 2 and 3, the transactions never fail. Is it valid to repeatedly read the PORTx output config register?
Here are a few scope shots to illustrate what is going on:
Thanks,
Mitchell