DS90UB941AS-Q1: remote access 948 without DSI input

Dongbao Zhou

Part Number: DS90UB941AS-Q1

Hello,

Can 941 communicate with 948 without the DSI input when 941as is configured in dsi reference clock mode? Auto-switch to internal AON clock is set as default, i think it should be ok (947/9 and 92x works, MCU can read the deseri registers through ser without PCLK), but i failed to read 948 registers through 941as.

I can see the 948 I2C address from 941as but i can't read or write it.

To remote read 948 registers, I have to enable 941as pattern generator (internal pclk) or change to internal reference clock mode, could you help explain the differences between 941as and other FPD-Link III devices?

Dongbao

over 5 years ago

0 Charley Cai over 5 years ago

TI__Genius 12866 points

Could you check if you have I2C path through enabled in 941AS?

Best Regards,

Charley Cai

0 Dongbao Zhou over 5 years ago in reply to Charley Cai

TI__Expert 4170 points

Charley,

Yes, I2C pass all is enabled.

Once the internal reference clock is enabled, it works well.

Dongbao

0 Charley Cai over 5 years ago in reply to Dongbao Zhou

TI__Genius 12866 points

Hi Dongbao,

Did enable pass through solve your problem?

Best Regards,

Charley Cai

0 Dongbao Zhou over 5 years ago in reply to Charley Cai

TI__Expert 4170 points

Charley,

It's not I2C pass through setting issue.

Can you try it on the 941AS EVM with 948？

Thanks

Dongbao

0 Charley Cai over 5 years ago in reply to Dongbao Zhou

TI__Genius 12866 points

Hi Dongbao,

I have tried the set up with a 941AS EVM and a 948 EVM.

I2C communication works fine for me in DSI reference mode with no DSI source connected.

Could you send me a register dump for both 941AS and 948?

Best Regards,

Charley Cai

0 Casey McCrea over 5 years ago in reply to Charley Cai

TI__Guru** 103215 points

Hello Dongbao,

Any feedback here? Are you able to provide a register dump?

Thanks,

Casey

0 Dongbao Zhou over 5 years ago in reply to Casey McCrea

TI__Expert 4170 points

Hi Casey,

Please see the register dump.

Register	Data	Name
0x0000	0x18	I2C_DEVICE_ID
0x0001	0x00	RESET_CTL
0x0002	0x00	DEVICE_CFG
0x0003	0x9A	GENERAL_CFG
0x0004	0x00	GENERAL_CFG2
0x0005	0x00	I2C_MASTER_CFG
0x0006	0x58	DES_ID /
DES_ID_1
0x0007	0x00	SlaveID[0]
0x0008	0x00	SlaveAlias[0]
0x0009	0x01	SDA_SETUP
0x000A	0x08	CRC_ERROR0
0x000B	0x00	CRC_ERROR1
0x000C	0x07	GENERAL_STS
0x000D	0x33	GPIO[0] Config
0x000E	0x00	GPIO[1] and GPIO[2] Config
0x000F	0x00	GPIO[3] Config
0x0010	0x00	GPIO[5] and GPIO[6] Config
0x0011	0x00	GPIO[7] and GPIO[8] Config
0x0012	0x00	DATAPATH_CTL
0x0013	0x8B	TX_MODE_STS
0x0014	0x00	TX_BIST_CTL
0x0016	0xFE	BCC_WDOG_CTL
0x0017	0x9E	I2C_CONTROL
0x0018	0x7F	SCL_HIGH_TIME
0x0019	0x7F	SCL_LOW_TIME
0x001A	0x01	DATAPATH_CTL2
0x001B	0x00	BIST_BC_ERRORS
0x001C	0x00	GPI_PIN_STS1
0x001D	0x00	GPI_PIN_STS2
0x001E	0x01	TX_PORT_SEL
0x001F	0x00	FREQ_COUNTER
0x0020	0x0B	DES_CAP1
0x0021	0x00	DES_CAP2
0x0026	0x00	LINK_DET_CTL
0x002E	0xA5	MAILBOX_2E
0x002F	0x5A	MAILBOX_2F
0x0030	0x01	REM_INTB_CTRL
0x0032	0x00	IMG_LINE_SIZE0
0x0033	0x05	IMG_LINE_SIZE1
0x0034	0x0C	IMG_DELAY0_IMG_DELAY0_P1
0x0035	0x00	IMG_DELAY1_IMG_DELAY_P1
0x0036	0x00	CROP_START_X0 /
CROP_START_X0_P1
0x0037	0x00	CROP_START_X1 /
CROP_START_X1_P1
0x0038	0x00	CROP_STOP_X0 /
CROP_STOP_X0_P1
0x0039	0x00	CROP_STOP_X1 /
CROP_STOP_X1_P1
0x003A	0x00	CROP_START_Y0 /
CROP_START_Y0_P1
0x003B	0x00	CROP_START_Y1 /
CROP_START_Y1_P1
0x003C	0x00	CROP_STOP_Y0 /
CROP_STOP_Y0_P1
0x003D	0x00	CROP_STOP_Y1 /
CROP_STOP_Y1_P1
0x003E	0x81	SPLIT_CLK_CTL0 /
SPLIT_CLK_CTL0_P1
0x003F	0x02	SPLIT_CLK_CTL1 /
SPLIT_CLK_CTL1_P1
0x0040	0x05	IND_ACC_CTL
0x0041	0x21	IND_ACC_ADDR
0x0042	0x60	IND_ACC_DATA
0x004F	0x8C	BRIDGE_CTL
0x0050	0x16	BRIDGE_STS
0x0054	0x02	BRIDGE_CFG
0x0055	0x00	AUDIO_CFG
0x0056	0x00	BRIDGE_CFG2
0x0057	0x02	TDM_CONFIG
0x0058	0x00	VIDEO_3D_STS
0x0059	0x00	DUAL_DSI_CTL_STS
0x005A	0x08	DUAL_STS /
DUAL_STS_P1
0x005B	0x05	DUAL_CTL1
0x005C	0x07	DUAL_CTL2
0x005D	0x06	FREQ_LOW
0x005E	0x44	FREQ_HIGH
0x005F	0xB3	DSI_FREQ /
DSI_FREQ_P1
0x0060	0x22	SPI_TIMING1
0x0061	0x02	SPI_TIMING2
0x0062	0x00	SPI_CONFIG
0x0063	0x00	VCID_SPLIT_CTL
0x0064	0x10	PGCTL /
PGCTL_P1
0x0065	0x00	PGCFG /
PGCFG_P1
0x0066	0x03	PGIA /
PGIA_P1
0x0067	0x03	PGID /
PGID_P1
0x006A	0x00	IMG_HSYNC_CTL0 /
IMG_HSYNC_CTL0_P1
0x006B	0x00	IMG_HSYNC_CTL1 /
IMG_HSYNC_CTL1_P1
0x006C	0x00	IMG_HSYNC_CTL2 /
IMG_HSYNC_CTL2_P1
0x006D	0x00	BCC_STATUS
0x006E	0x20	BCC_CONFIG
0x006F	0x00	FC_BCC_TEST
0x0070	0x00	SlaveID[1]
0x0071	0x00	SlaveID[2]
0x0072	0x00	SlaveID[3]
0x0073	0x00	SlaveID[4]
0x0074	0x00	SlaveID[5]
0x0075	0x00	SlaveID[6]
0x0076	0x00	SlaveID[7]
0x0077	0x00	SlaveAlias[1]
0x0078	0x00	SlaveAlias[2]
0x0079	0x00	SlaveAlias[3]
0x007A	0x00	SlaveAlias[4]
0x007B	0x00	SlaveAlias[5]
0x007C	0x00	SlaveAlias[6]
0x007D	0x00	SlaveAlias[7]
0x00C2	0x82	CFG
0x00C4	0x48	STS
0x00C6	0x00	ICR
0x00C7	0x44	ISR
0x00F0	0x5F	TX_ID0
0x00F1	0x55	TX_ID1
0x00F2	0x42	TX_ID2
0x00F3	0x39	TX_ID3
0x00F4	0x34	TX_ID4
0x00F5	0x31	TX_ID5

0 Casey McCrea over 5 years ago in reply to Dongbao Zhou

TI__Guru** 103215 points

Hello Dongbao,

The PCLK detect bit is high in the 0x0C register which means it seems that the device may still be detecting some sort of clock input. If there is no source connected then it is probably picking up noise. Can you try setting 0x4F[7] = 1 to put the device in discontinuous clock mode when there is no DSI input attached? That should help prevent noise from triggering the clock detect. You could also terminate the CLK differential input channels with a resistor to make sure there is no noise impact.

Best Regards,

Casey

0 Dongbao Zhou over 5 years ago in reply to Casey McCrea

TI__Expert 4170 points

Hi Casey,

Thanks for your feedback. I wonder if the fpd-link channel's signal quality affects the I2C, because the D+/- are crossed due to the wrong connector pin definition.

Thanks.

Dongbao

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DS90UB941AS-Q1: remote access 948 without DSI input