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SN65DSI83: recommendation for new selection

Part Number: SN65DSI83
Other Parts Discussed in Thread: SN75LVDS82, , SN65LVDS822

Hi team,

I need to chose an interface from MIPI DSI to parallel CMOS RGB for display driving. Basically we have a microprocessor with MIPI output to be interfaced with small cut displays, in fact a 4.3 "and a 7" controlled in RGB 24 bit with 3.3V controller (maximum resolution 800x480). To this end we were thinking of a combined SN65DSI83 + SN75LVDS82. Is it the right way? You can recommend the best solutions and / or cheaper?

Please let me know.

Thank you in advance for your support.

Best regards,

Adrian

  • Hi Adrian,

    What is the minimum resolution that you want to support? Please note that the resolution determines the clock frequency, and these parts have minimum/maximum supported clock frequencies. For the SN65DSI83, the minimum supported frequency is 25 MHz, while for the SN75LVDS82 the minimum supported frequency is 31 MHz.

    For a 800x480 display (assuming 10% blanking and 60fps), the required clock frequency is 25.344 MHz, which is right at the minimum frequency for the SN65DSI83, and is out of specification for the SN75LVDS82. 

    You can use equation 1 in this document: http://www.ti.com/lit/an/slla356/slla356.pdf to calculate what clock frequency is needed. If you have access to the display datasheet you can just use equation 3. 

    Nonetheless, the SN75LVDS82 will probably not work for your application due to the low clock frequency. The SN65LVDS822 would be better as it has a lower supported clock frequency range of 4 MHz to 54 MHz. Please also note that resolutions lower than 800x480 will probably not work due to the 25 MHz minimum clock frequency of the SN65DSI83. 

    Regards,

    I.K. 

  • Hello I.K,

    thank you for the quick reply. My customer is using the Display of 4,3” with 480x272 pixels and a DOT clock of 9MHz. Do you have any recommendation?

    Thank you in advance!

    Best regards,

    Adrian

  • Hi Adrian,

    Sorry but 9MHz is much too slow for for the DSI side. We don't have a solution for them.

    Regards,

    I.K.