SN65DSI86EVM: SN65DSI86EVM: Design files

Joe

Schematic is included in the SN65DSI86EVM user guide: https://www.ti.com/lit/ug/sllu204/sllu204.pdf.

Please accept my friendship request so I can send you the board file.

Thanks

David

Hi David:

Thank for your help. I had added you to friendship.

Please help to provide board file to me.

Thank you~

Joe

I sent you the board file, please check.

Thanks

David

Hi David:

The SN65DSI86 impedance spec define:

Single-ended= 50-Ω (±15%)

Differential= 100-Ω (±20%)

We're using board file and default stackup to check main link impedance. But single-ended impedance was found to be out of spec. (Differential is right)

Is this an alternative? Or both need to meets?

Thank you~

Joe

Please follow the DSI86 datasheet and hardware design guide: http://www.ti.com/lit/an/slla343/slla343.pdf.

DA*P/N and DB*P/N pairs should be routed with controlled 100-Ω differential impedance (±20%) or 50-Ω single-ended impedance (±15%).

ML*P/N pairs should be routed with controlled 100-Ω differential impedance (±20%) or 50-Ω single-ended impedance (±15%).

Thanks

David

Hi David:

After checked the layout guide. The Intra-pair lengths need within 5 mils of each other.

But checked layout file the main link is over lengths spec. It is correct?

Thank you~

Joe

Please keep the intra-pair skew within 5mil.

Thanks

David

Joe

I don't know why the EVM was initially designed with 20mil intra-pair skew. But I would design the board with the recommended 5mil intra-pair skew.

0552.Texas Instruments DisplayPort Design Guide.pdf

Thanks

David