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DS90UB924-Q1: When does the device lose lock?

Part Number: DS90UB924-Q1

Dear team,

In the datasheet, it said when clk0,clk1 and DCA have errors, the device will lose lock.

1. How does the device monitor the error, checking bit by bit or checking CRC? 

2. What is the DCA?

3. When the link happens, how long can the device find the error ? About the time, is there the computation equation?

Thanks & Best Regards,

Sherry

  • Hello Sherry,

    The FPD-Link protocol creates packets (frames) to send over the high speed forward channel. These packets contain video data, clock bits, and other data including encoding bits. In this case the 924 packet structure contains 2 clocking bits per frame and a DCA bit which is for FPD-Link encoding. When each packet is received these specific bits can be checked against their expected value and if there is not a match, then an error will be flagged. The device can not check every single bit of received data because it does not know the expected video pattern. Full CRC also can not be performed because the forward channel is much faster than the back channel.

    As soon as an error is seen with one of those bits an error will be flagged in this register. There is basically no delay time (or it is orders of magnitude shorter than the time it takes to read this register over I2C. 

    Best Regards,

    Casey 

  • Hi Casey,

    Thanks for your detailed reply!

    Thanks & Best Regards,

    Sherry