TUSB7320: Can not communicate with SOC

Hi,

It seems that the PCIE reference clock started at the same time as the 48 MHz reference oscillator briefly. Do you have separate control of these clocks and can you ensure that the PCIE reference clock does not start at the same time as the 48 MHz reference clock. Also could you provide a scope shot including PERST and 1.1V rail?  

From the schematic:

• Why is SSRX on the downstream ports pulled down?
• PWRON pull down resistors can be removed.

Hi Malik,

Now PCIE is worked, but SOC can not get address from TUSB7320,

here I attach the massage from console for yuor reference.

Thank you.

C.T.

Hi Malik,

Is there any update? thank you.

C.T. 

Hi C.T.,

Sorry for the delayed response, I am still looking into possible causes for this issue and hope you get back to your by the end of today. 

sorry for the delayed response. Do you have new waveform after PCIe working? can you take two waveforms?

1: Vdd33, Vdd11, GRST, 48Mhz.

2: Vdd33, GRST, PERST, PCIE_REFCLK

hi, any update?

still has issue?