Hi team,
Does the XIO2001 support on it's own IRQ?
It looks IRQ and PCIE root port are shared?
We would like to know it's independent IRQ or not.
Thank you!
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The datasheet says:
4.28 Interrupt Pin Register
The interrupt pin register is read-only 00h indicating that the bridge does not generate internal interrupts. While the bridge does not generate internal interrupts, it does forward interrupts from the secondary interface to the primary interface.
Correct. The bridge does not generate internal interrupts. It converts interrupts from the PCI bus sideband interrupt signals to PCI Express interrupt messages.
Regards,
Davor