DS90UB948-Q1: power up sequence question

Hello Taoran,

The datasheets contain the most up to date power sequence information so please go by those guidelines. For demo code since there are so many different use cases for the device it is difficult to provide one solution. Is there a particular feature that the customer is looking to implement where we may be able to provide some guidance? 

Thanks,

Casey 

Hi Casey,

Thank you for your reply. 

I just want to know the basic design rules and the primary registers I have to configure, because there is so many register that I don't know where to start.

Gary 

Hi Casey,

Besides, I have another question about DS90UB949. I notice that in table 14, t3=t4=2ms, and there are two t3 in figure 32 and figure 33, so I suppose they are the same one. 

Because t3 is the I2C delay time, and after t3 initialization sequence A will begin. According to figure 32, after t3 the device is also performing reset using PDB 1-0-1 sequence. So 949 will perform initialization sequence A and reset at the same time?

Or device resets using PDB is not always needed, so in figure 33 it's the case that the device do not perform reset after PDB pulled high?

Thank you.

Gary

Hi Gary, 

If you can provide us with a high level block diagram, we can help you with some basic registers to program. 

Hi Gary, 

I am confused about what you're asking. Figure 32 doesn't show any initilization via I2C. t3 and t4 are just showing the PDB high time for I2C communication and PDB low time for reset. The device will not initialize and reset at the same time. You do not need to reset after PDB, that figure is just trying to show the minimum time for t3 and t4.