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DP83849I: About setting odd address by PHY address register

Part Number: DP83849I


Hello,

Regarding to PHY address on DP83849I, my customer is asking some question.

(Question)

(1 )Can we set to odd address by PHY address register[4:0] (page 77)?

(2) Can we set to “1” on bit0 of PHY address register[4:0](page 77)?

(3) If possible, which port is odd address? (A or B port)

 

Regards,

Tao_2199

  • Hello Tao,

    The strap settings on pins 4, 5, 58 and 57 determine the addresses of both the PHYs. PHY address cannot be set through register configuration.

    Port A supports even values and Port B supports odd values.

    Please read "3.2.7 Strap Options".

    Thanks,

    Vibhu

  • Hello Vibhu,

     

    Thank you for reply.

    I have more some question.

     

    (1) According to datasheet(page77), default value of PHY address register[4:0] is described as following.

    After reset, the PHY address register(PHYADDR) [4:1] is latched by bootstrap input pins.

    And after that, can we write to new value to this register(PHYADDR) [4:1] as PHY address again?

     


     

    (2) According to datasheet(page10), the PHY address bit[0] depends on the Port A/B

    and bit[4:1] are selected based on bootstrap input pins.

    After reset, bit[4:1] are latched by bootstrap input pins.

    In this case, how is value in PHY address register(PHYADDR) bit[0]? (0 or 1?)

    And can we write to new value(0or1) to PHY address register(PHYADDR) bit[0]?

    Or is bit[0] fixed to 0?

     

    Regards,

    Tao_2199

  • Hello Tao,

    The PHYADDR will always only be set by the strap options. That may be a typo.

    PHYADDR[0] always depends on port A/B.

    We cannot write new value to any of these bits.

    Thanks,

    Vibhu

  • Hello Vibhu,

     

    Thank you for reply.

    We have understood by your description.

    This time , we were confused by datasheet typo. (page 62,77)

    Do you have a plan about new revision? (Modify typo.)

    I hope that these typos will be modified soon.

     

    Regards,

    Tao_2199

  • Hello Tao,

    Thanks for pointing this out, I will make note of this. I'm glad the issue is clear.

    Thanks,

    Vibhu

  • Hello Vibhu,

     

    Many thanks!
    I will close this thred.

    Regards,

    Tao_2199

  •  

    Hi Vibhu,

    I work with Tao_2199 and we have same project.

    My customer tried following steps.

    It seems that Read and Write access of PHTCR(0x19) and individual setting for A/B of PHY Address are possible.

    It is not described on datasheet.  Is it possible to apply this way?

    ■The procedure for changing the PHY address

    When the hardware is up, PHY ADDR = 0 for port A and PHY ADDR = 1 for port B.

    ① Write 3 to PHYCR (19h) for PHY ADDR = 0 of port A and change to PHY ADDR = 3.

    ② Write 0 to PHYCR (19h) for PHY ADDR = 1 of port B and change to PHY ADDR = 0.

    ③ Write 1 to PHYCR (19h) for PHY ADDR = 3 of port A that was changed by previous step, and change it to PHY ADDR = 1.

    ④ The address of A port and B port was able to be exchanged.

      Rewrite including PHY ADDR [0] was possible.

    Best Regards,

    ttd

  • Hello,

    The PHY ADDR is not meant to be written to. The address must only be configured via strap pins. I cannot guarantee you will see no issues with the method described above.

    Thanks,

    Vibhu

  • Hi Vibhu,

    Thank you for your reply.

    Sorry to bother you again.

    I guess that writing to PHYADDR had not been tested  for the correct operation(specification) during developing DP83849 at the time..

    So is writing function prohibited ?

    Not only DP83849, but also DP83822 is RO(read only) and DP83825 is H(hardware strap) for PHY ADDR.

    Is there any background(issue) to profibit writing to the PHY ADDR through software after strap configuration(HW)? 

    If you have some reason, I hope that datasheet of DP83849I/C will be fix from "RW" to "RO" or "H" in the near future.

    Best Regards,

    ttd

  • Hello,

    Writing to the register address registers is not recommended practice.

    Yes, the PHY ADDR bits are across all parts are read-only / strap pins. I have made a note of this in the system for the next datasheet refresh.

    Thanks,

    Vibhu