DS90UB929-Q1: Can the INTB pin be configured to go low when the REM_INTB goes low?

Michael Von Ahnen

Part Number: DS90UB929-Q1

We have a design where we want to monitor only one interrupt from the DS90UB929. In reading the datasheet it appears that setting bit 5 of register 0xC6 (ICR) allows the INTB pin to go low when the deserializer forwards an interrupt from the remote device (which would also cause REM_INTB to go low). Am I reading this correctly?

over 5 years ago

0 Charley Cai over 5 years ago

TI__Genius 12866 points

Hi Michael,

REM_INTB pin going low is independent of INTB pin.

If you plan to monitor only one interrupt, REM_INTB might be a better option sice it requires no configuration and the pin status just follows the INTB_IN pin status on the deserialize.

Best Regards,

Charley Cai

0 Michael Von Ahnen over 5 years ago in reply to Charley Cai

Intellectual 580 points

You did not actually answer my question. Rephasing, what does setting bit 5 of register 0xC6 do on the 929?

0 Charley Cai over 5 years ago in reply to Michael Von Ahnen

TI__Genius 12866 points

Hi Michael,

Your understanding was correct. Enable bit 5 will allow deserializer interrupt to propagate to 929 INTB and INTB_IN pins.

Best Regards,

Charley Cai

0 Michael Von Ahnen over 5 years ago in reply to Charley Cai

Intellectual 580 points

Thanks for the clarification.

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DS90UB929-Q1: Can the INTB pin be configured to go low when the REM_INTB goes low?