DP83822IF: Interface forum

John11513

Part Number: DP83822IF

Hi Team,

I am promoting DP83822IF to some customer. To help customer i drafted a schematic as attached. Lacking experience of ethernet PHY design, i have not enough confidence about it. Could anyone help me review this design?

The target configuration is:

MAC I/F: RGMII

MDI: 100BASE-TX

PHY ADDRESS: 0x1h

Auto-negotiation mode: enable

LED0: ON for good link, OFF for no link

LED1: ON for 100Mbps, OFF for 10Mbps

EEE mode: OFF

Fast Link Drop: OFF

Auto MDIX: Enable

clock: 25MHz crystal

Thank you!

DP83822IFDesign_RGMII.pdf

over 5 years ago

0 Vibhu Vanjari over 5 years ago

TI__Genius 11900 points

Hello John,

Please see my comments below:

Ensure that the strap resistors have low variation to ensure the voltage ranges of the strap modes are met. To be safe I would recommend 1% variation resistors.
The MDIO pin requires a 2.2 k-ohm pull-up resistor.
Currently AN_EN = 1, AN_1 = 1 and AN_0 = 0, this sets to half-duplex modes. Something to be aware of.

Thanks,

Vibhu

0 John11513 over 5 years ago in reply to Vibhu Vanjari

TI__Expert 5720 points

Hi Vibhu,

Thank you for your reviewing and advice.

I am still confused. I had thought the speed and duplex mode is auto-negotiated between two ends, no matter with AN_1/0 once AN_EN=1. Is it incorrect?

To configure AN_0=1, LED_0 needs to be floating, how should i drive LED0?

Thank you!

John

0 Vibhu Vanjari over 5 years ago in reply to John11513

TI__Genius 11900 points

Hello John,

Yes your statement is incorrect, please refer to table 12, it describes the modes advertised during auto-negotiation based on strap settings.

Please refer to "8.5.2 LED Configuration" on how to setup the circuit for LED_0. You will need a pull-up resistor between 1.96 k-ohm to 2.49 k-ohm in parallel to the LED as described in this section.

Thanks,

Vibhu