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DP83867IR: DP83867IRRGZR register access

Part Number: DP83867IR

Hi, Team.

could you tell me below?

what does below mean?

Q1.does it mean that customer can access the register up to 31(0x1F)?

(drive from its datasheet p35)

in normal MDIO transactions, the register address is taken directly from the management-frame reg_addr field, thus
allowing direct access to 32 16-bit registers (including those defined in IEEE 802.3 and vendor specific). The
data field is used for both reading and writing.

Q2.if the register we could take directly up to 0x1F, how would we be able to access rest of the registers ?

 Q3. is it same rule as other ethernet PHY as 88E1310 from Marvell?

Q4. how can we access the register as 0x0086 ,RGMIIDCTL?

  • Hello Masa-san,

    There are two types of registers in the PHY, ones that have direct access and ones that have indirect access. The first 32 registers can be accessed directly while the other registers "using registers REGCR (0x000Dh) and ADDAR (0x000Eh) and the MDIO Manageable Device (MMD) indirect method defined in IEEE 802.3ah Draft for clause 22 for accessing the clause 45 extended register set." Please refer to "8.4.2.1 Extended Address Space Access" for more information on this.

    RGMIIDCTL must be accessed using the process described in the section referenced above. Please also make sure to look through the sub sections as they include examples of how to read and write using indirect register access.

    Thanks,

    Vibhu