Hi, Team.
could you tell me below?
what does below mean?
Q1.does it mean that customer can access the register up to 31(0x1F)?
(drive from its datasheet p35)
in normal MDIO transactions, the register address is taken directly from the management-frame reg_addr field, thus
allowing direct access to 32 16-bit registers (including those defined in IEEE 802.3 and vendor specific). The
data field is used for both reading and writing.
Q2.if the register we could take directly up to 0x1F, how would we be able to access rest of the registers ?
Q3. is it same rule as other ethernet PHY as 88E1310 from Marvell?
Q4. how can we access the register as 0x0086 ,RGMIIDCTL?