This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCA9406: rise up waveform abnormal and violate I2C Tr spec

Part Number: TCA9406

Hello expert,

Customer used our TCA9406 in their gaming NB application and they found out there is two-stage rising up and Tr is over I2C spec. May I know if this is normal behavior in TCA9406? Thanks a lot!

Best regards,

Ann Lien

  • Hi Ann,

    I2C specifies a Maximum rise-time for standard mode (100kHz) and fast mode (400kHz) of 1000ns and 300ns respectively. TCA9406 specifies a rise-time of near 9ns depending on supply voltage. This is consistent with the scope shot you shared. This time is well below the maximum rise time for both defined modes. TCA9406 takes advantage of such strong rise-time accelerators to support data rates of 1MHz (Fast-mode plus) and higher depending on bus capabilities. 

    Let me know if you have any more questions. 

    Regards,

    Eric

  • Hi Eric,

    if customer operate at I2C fast-mode, the raise time min is 20ns, how customer to adjust? by register?

    Walt Hsu

  • Hi Walt,

    Typically rise-time requirements for I2C are constrained by the maximum. It's interesting to me that the minimum time is only specified for Fast Mode and even exceeded in this case. TCA9406 supports I2C Normal Mode and Fast Mode as well as High Speed Mode which requires very fast rise times. This is why the rise time accelerators are so strong in this device. 

    Typical I2C rise times are dependent on an RC constant. This is normally increased by an increase in bus capacitance. There are no registers on TCA9406 to control the rise time accelerators. 

    Does the customer have a specific concern about fast rise times or are they just trying to meet the I2C spec? I'm not sure why this is specified specifically for Fast Mode and not for others and I'm curious as to their desire to lengthen it.

    Regards,

    Eric

  • Hello Eric,

    Customer just want to confirm if this device can communicate normally with I2C even this spec is violated. Since they only test a few devices and they found out the condition exists for all the board. May I know if there are many customers replied I2C issue on this device? If no, I can assume there is low risk for this tr spec. Thanks a lot!!

    Best regards,

    Ann Lien

  • Hi Ann,

    I do not anticipate that this would cause problems with I2C communication. Often a Minimum rise-time spec is given to reduce emissions which may contribute to cross-talk in I2C applications. I would monitor this in your application but would not expect it to impact data. 

    Greater bus capacitance will lower rising slew rate for this device so in other applications the rise-time is likely longer. However, the rise-time accelerators in this device are designed to make this transition fast to support higher data rates. I do not see anything out of the ordinary in the scope shots you shared.

    Regards,

    Eric 

    Edit - "Minimum" rise-time spec for emissions. Not "Maximum"