Hi Team,
Is there any specs for internal ESD of A/B pins such as reverse stand-off voltage/breakdown voltage/surge clamping voltage?
Thanks and Best Regards!
Hao
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Hi Team,
Is there any specs for internal ESD of A/B pins such as reverse stand-off voltage/breakdown voltage/surge clamping voltage?
Thanks and Best Regards!
Hao
Hao,
Unfortunately TI doesn't characterize the internal ESD cells. Please refer to Figure 18 on page 16 on the datasheet for the related information. The standoff voltage of A/B pins is about 16V and the cells will start taking current with the voltage above it. The clamping may vary due to the process variation. What's the customer concern? If you want to check out new TI devices with different ESD performance (like surge protection), please refer to this post.
Regards,
Hao
Hi Hao,
Customer found some failure at A/B pins even by adding 15V TVS on both pins. So they want to know the specs of internal ESD to check the possible reasons. That's why I'm asking for the specs.
Thanks and Best Regards!
Hao
Hao,
To debug, you may need to do some analysis about the failure. If the EOS events are beyond the operation region of TVS diodes, the IC can still get damaged. Please let me know if you have more questions.
Regards,
Hao