Hi team,
My customer has the following problems, which are described in Chinese. I am not familiar with eye diagram test. I translate the questions from Chinese to English. If there are descriptions that confuse you, please point out.
1、U.2-1 without redriver : eye diagram test PCIE GEN3 RMS jitter fail,lan0-lan3 all fail,3.2~3.6ps, Shorter route, Intel spec less than 3ps
U.2-2 with redriver : eye diagram test PCIE GEN3 RMS jitter fail,lan0-lan3 all fail,3.7~4.2ps, Longer route
2、PCIE GEN3 clock test：About jitter part test pass
3、Use the PCIe X4 and U.2 that passed the test to cross verify the clock and date eye diagram test:
U.2 clock + PCIE X4 date： RMS jitter pass.2 date + PCIE X4 clock： RMS jitter fail
4、Adjust DEW,DE,EQ, eye diagram changes, RMS jitter still fail
Help to see the relationship between RMS jitter fail and date, thank you!
attachments：
3173.SAK4 U.2 GEN3 lane0 data.pdf
SAK4 v100_layout guide-PCIE.xlsx
PCIe Compliance Report for U.2 1.pdf
PCIe Compliance Report for U.2 2.pdf
Best Regards,
Amy Luo
