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SN75DP130: I2C readings

ACM
Prodigy 130 points

Part Number: SN75DP130

Hi all,

I'm debugging a DP source where I'm using the DP130 as PHY, in the first stages I didn't used the internal I2C registers, now I have some problem in the training stage so I have to read the internal registers and in the datasheet I read:

"No sub-addressing is included for the read procedure, and reads start at register offset 00h and continue byte by byte through the registers until the I 2C master terminates the read operation"

Actually this not seems to work for me, everything works if before the read I write the first register I want to read; Is this right? 

Regards

  • 0
    TI__Guru**** 187331 points

    The read/write start condition is the same, the master initiates the operation by generating a start condition (S), followed by the SN75DP130 7-bit address and a one-value "W/R" bit to indicate a read cycle, or a zero-value "W/R" bit to indicate a write cycle. 

    Do you have trouble reading the DP130 registers through the I2C bus? The SN75DP130 I 2C interface is enabled when EN and RSTN are input high. Please also make sure you have the proper pullup resistor on SDA_CTL and SCL_CTL.

    The DP130 can not act as a DP PHY, it is a limiting re-driver only. 

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 130 points

    Hi,

    I mean that in the datasheet seems that the reading start always from register 00h, but I don't see that. 

    To read register 04h I generate a start condition followed by the DP130 7 bit address with the last bit set to write and 1 byte with 04h, then I repeat the operation with the last bit as READ and I read 1 byte.

    Right?

    Regards 

  • 0 in reply to ACM
    TI__Guru**** 187331 points

    This is the correct operation.

    Thanks

    David