Hi Team,
My customer met EMI problem when using 933/934 ,which has mentioned in:
https://e2e.ti.com/support/interface/f/138/t/863317
So I ask them for PCB layout to review and found that It looks OK except the following points:
- This customer use TOP-GND-POWER-BOTTOM. So as for the high speed signal (Rin/Dout), they lay on the top layer instead of using stripline…
Do I need to suggest them to change stripline? How many layouts do you recommend if using stripline?
- Buried FPD-Link III High-speed Trace on Signal Layer 1 (the same as the 1st point)
May I ask:
- Are there other things they need to consider as the following layout?
Thanks again!
TOP
BOTTOM




