SN65MLVD204A: About output FET

G.Matsushita

Dear all,

Sorry to ask such a basic question.

I think that FET connected in series to output terminal(A/B or B/A) is FET controlled by DE terminal in description of figure 9.4.2 of page 18 of datasheet(SN65MLVD204A) . is it correct ?

Best Regards,

Matsushita

over 6 years ago

0 Ikechukwu Anyiam over 6 years ago

TI__Mastermind 35130 points

Hi Matsushita-san,

I'm not quite sure myself, as A/B are affected by both DE and RE# since the driver and receiver share the same signal path. However, the internal workings of the FETs is not something required to understand to use this device.

Regards,

I.K.

0 G.Matsushita over 6 years ago in reply to Ikechukwu Anyiam

Prodigy 70 points

Hi Anyiam-san,

Thanks for reply.

I considered output signals when DE and D controlled same time, so I thought that FET is affected by DE ( or RE).

>>as A/B are affected by both DE and RE# since the driver and receiver share the same signal path.

I understand.

Regards,

Interface

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SN65MLVD204A: About output FET