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DS90UA101-Q1: Various Questions

Evan Cornell
Expert 1520 points

Part Number: DS90UA101-Q1
Other Parts Discussed in Thread: DS90UA102-Q1

  • Is there an eval board available for DS90UA101-Q1 & DS90UA102-Q1 ? I did not see any on the website available, and I would like to run some tests on cable samples to validate the cable bandwidth before building my custom board. 
  • Can CMLOUT pins on DS90UA102-Q1 be hooked up to SMA connector or other high-speed connector for easier evaluation of eye diagram quality?
  • My system will have two SerDes links, one in each direction - thus I have one DS90UA101 and one DS90UA102 on the end of the link that has no MCU present:
  • does that mean that PDB must be triggered by DC-DC PGOOD signal (or RC delayed from last power rail) for proper operation? 
  • How should OEN, BISTEN, and OSS_SEL be handled? perhaps OEN tied high permanently, OSS_SEL tied to LOCK output, and BISTEN pulled low permanently? 

Thanks!

  • 0
    TI__Guru** 103215 points

    Hello Evan,

    Unfortunately we do not have an EVM available for these products.

    CMLOUT can be hooked up to SMA outputs for easy evaluation.

    Typically for PDB we recommend using an RC circuit to delay the PDB signal until after the power supplies ramp. For example, 10k pull up and 10uF cap to ground.

    The other pins, BISTEN, OSS_SEL, and OEN depend on how you would like to use the device. For example, if you will not be using the BIST functionality, then you could tie it low directly.

    Best Regards,

    Casey