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DP83867E: .

Part Number: DP83867E

Hello,

I will be using TI DP83867E PHY chip on my designs. I have couple questions:

1-) INT / PWDN, I would like to pull down this pin to power down the component(has already an internal pull-up 9k so I need a stronger pull down) when my board wakes up and let my FPGA/Processor to decide to enable it. On the other hand, I also want to use the interrupt pin. But TI recommends an external 2.2k pull-up resistor for interrupt pin. Is there anyway that I can use both functionalities? This 2.2k pull up resistor is mandatory? 

2-) TI recommends not to leave input pins float, If we leave I/O pins float, would it be a problem? For example, LED_1 pin? Do I also need to pull this pin down?

Best Regards,

Onur

  • Hello Onur,

    1) After power up you can configure registers to program the pin as an interrupt via the MDIO/MDC. Please refer to register 0x0012, 0x0013 and 0x001E in the register section of the datasheet.

    2)  Please follow "6.1 Unused Pins"

    Thanks,

    Vibhu

  • Hello,

    1-) After power up you can configure registers to program the pin as an interrupt via the MDIO/MDC. Please refer to register 0x0012, 0x0013 and 0x001E in the register section of the datasheet.

    I know this is possible but for Powerdown/interrupt pin, it is recommended to use a pull-up if you want to use it as an interrupt even though there is an internal pull-up. Now I want to pull this pin down to put the chip on power-save mode when the board wakes up and let my FPGA/Processor decide to wake this chip up. My concern here, after my FPGA/Processor wakes this chip up and configures the registers (0x0012, 0x0013 and 0x001E) via MDC/MDIO to use this PWDN/Interrupt pin as an interrupt, I will have a pull-down resistor there in stead of pull-up like TI recommends in the datasheet. Would this cause any problem is my question?

    2-) Please follow "6.1 Unused Pins"

    I followed 6.1 Unused pins,  For Input pins it recommends to pull it up or down except Optional 1V8 power rail. Some pins are I/O pins. Do I need to check their default function and decide to pull it down/up? 

    For example, LED_1 is an Input/Output-pin. By default it indicates 1000 base link is established and it is an output pin. Do I need to pull this down/up?  

    Best Regards, 

  • Hello Onur,

    1) I suggest to use an external pull-down and supply a voltage high using the FPGA GPIO as needed.

    2) You can leave these pins floating.

    Thanks,

    Vibhu