Part Number: SN65DSI84
Hi, I'm trying to write linux driver for SN65DSI84. I use this files as example.
DSI:
lanes = 4,
format = RGB888,
clock = 280 MHz
display-timings (from device tree):
timing0: timing0 {
    clock-frequency = <70000000>;
    hactive = <1024>;
    vactive = <768>;
    hback-porch = <160>;
    hfront-porch = <24>;
    vback-porch = <29>;
    vfront-porch = <3>;
    hsync-len = <136>;
    vsync-len = <6>;
    hsync-active = <0>;
    vsync-active = <0>;
    de-active = <0>;
    pixelclk-active = <0>;
};
I set DSI_CLK_DIVIDER to divide by 4 (LVDS clock = 70 MHz)
Test pattern work fine, but for real DSI signal I have an errors. Register 0xE5 bit2 and bit3 (CHA_SOT_BIT_ERR, CHA_LLP_ERR).
 
				 
		 
        		 
					 
                           
				
 
				 
				
