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DS90UB947-Q1: The LVDS clock spec. of Tr (Rise time) and Tf (Fall time)

Ansel Song
Expert 3890 points
Part Number: DS90UB947-Q1

Hi Team,

As we know, sometimes in order to improve EMI performance, consider adding a small capacitor at both ends of CLK +/- like the below picture, which will also slow down the clock's raise time and fall time.

So I want to confirm what are the requirements for the raise time and fall time of 947? Or how to determine the value of this capacitor? Thanks.

Best regards,

Ansel

  • 0
    TI__Expert 3390 points

    HI Ansel,

    If you did want to control the rise/fall time, would it not be easier from the processor side? Nevertheless, We don't have a special requirement for the rise/fall time. In terms of EMI performance, you'd want to make sure the skew between the Positive and Negative is as close to 0 mils as possible, so the differential signal can naturally cancel any noise. Additionally, you'd want to make sure that you provide termination for these signals as close to the pins as possible to avoid any reflections. 

    Regards,
    Mandeep Singh

  • 0 in reply to Mandeep S
    TI__Guru** 103215 points

    Hello Ansel,

    It is not recommended to place these caps to ground in order to shape rise/fall time. This will degrade the sampling window which will decrease jitter/skew tolerance for the OLDI interface. It is recommended to improve EMC performance at the system level by ensuring good trace length matching or by burying these traces as stripline if they will be traveling a long distance on the PCB. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Expert 3890 points

    Hi Casey,

    Actually, I agree with you very much, but in the actual test, the customer found that connecting the capacitor is the most effective method (capacity value is 12pF).

    So do you think that this capacitor must not be added or that the capacitance value is acceptable within a certain range?

    Or after adding a capacitor, the jitter of the final test clock is within the Spec. Is it acceptable to add a capacitor? Thanks.

    Best regards,

    Ansel

  • 0 in reply to Ansel Song
    TI__Guru** 103215 points

    Hello Ansel,

    Again, I would not recommend adding this capacitor. It is not good design practice for 947 as it will degrade performance of the OLDI input data sampling. EMC should be improved through board layout improvement or system level shielding improvement. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Expert 3890 points

    Hello Casey,

    Thanks for your reply and explanation.

    Best regards,

    Ansel