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DS90UB941AS-Q1: Half screen display behaviour

alexandre lazareff
Intellectual 490 points
Part Number: DS90UB941AS-Q1

Hello,

We are developping a product using the 941 / 948 SerDes configuration

The first version worked fine with the chip revision :

  • GPIO_0_Config (0x0D) REV_ID = 0010

The new revision is using a new SoC, and we only see half of the screen, even when are displaying the pattern of the IC (color bar ...)

  • GPIO_0_Config (0x0D) REV_ID = 0011

When we change the DSI config of the SOC we see no change on the screen.

Both are using the exact same screen, and reads TX_ID (0xF0 to 0xF5) = _UB941

The Pixel data rate is 71MHz, the resolution is 1280 x 800 x 60

We use 1 FPD Link lane in coax.

The configuration is : 

MODE0 = 4
Split = 0
DSI Lane =4

MODE1 = 3
Clock = 0
Coax = 1
Disable DSI = 0

IDx = 0x0C

Is there a specific register which could explain this behaviour ? or if there is a difference between both IC revision ?

Thanks,

Best regards,

Alexandre

  • 0
    TI__Mastermind 25955 points

    Hi Alexandre,

    Are you able to see the full screen when using the new SOC with the 941 revision 0010?

    Are you able to see the full screen when using the old SOC with the 941 revision 0011?

    Sincerely,
    Bryan Kahler

  • 0 in reply to Bryan Kahler
    Intellectual 490 points

    Hi Bryan,

    Unfortunately, we can't switch the configuration. The SOC and the 941 are soldered on the same board.

    Best regards,

    Alexandre

  • 0 in reply to alexandre lazareff
    Intellectual 490 points

    Hi Bryan,

    Below the screen picture with half of the screen and the color bar:

    If we implement in the register the screen configuration for the pattern generator, we have the correct color bar :

  • 0 in reply to alexandre lazareff
    TI__Mastermind 25955 points

    Hi Alexandre,

    Thank you for the images of the display and pattern generation.  These are very helpful.

    Could you confirm the Mode No.  for MODE_SEL0 and MODE_SEL1?

    The above description of the settings match Mode No. 3 and 2, respectively, not 4 and 3 as described above.

    Please read register TX_MODE_STS (0x13) to confirm the values set by the strap.

    Assuming this is just an off by 1 typo because the table starts with 0 instead of 1 and that the values for splitter, dsi lanes, clock, coax and disable dsi are as described:

    Disable DSI is recommended to be set to 1 via the strap for mode_sel because DSI must be configured prior to the DSI reciever being brought up.

    Please read and share the values from register BRIDGE_CTL (0x4F) and BRIDGE_CFG2 (0x56).  

    Confirm that DUAL_DSI_EN and DUAL_DS_LR_EN are not set.  

    Please also read and share the values from register DUAL_CTL1 (0x5B).

    Confirm that the setting for FPD3_TX_MODE and FPD3_COAX_MODE are proper.

    If the bits are not set, see if the device is coming up in an unintended configuration by strapping the device to the DSI Disabled, state.  After PDB goes high and stabilizes, read registers and confirm the DSI based settings are proper.  Then, enable DSI by setting the DISABLE_DSI bit in the RESET_CTL register to 0.

    Please let me know if problems still persist after these steps.

    Sincerely,
    Bryan Kahler

  • 0 in reply to Bryan Kahler
    Intellectual 490 points

    Hi Bryan,

    Below the data you requested:

    MODE_SEL0 :

    mode n°3
    Split = 0
    DSI Lane = 4

    MODE_SEL1 :

    mode n°2
    Clock = 0
    Coax = 1
    Disable DSI = 0

    TX_MODE_STS (0x13)  = 0xab

    BRIDGE_CTL (0x4F) = 0x8c

    BRIDGE_CFG2 (0x56) = 0x00

    DUAL_DSI_EN = 0: Single-DSI mode
    DUAL_DSI_LR_EN = 0
    DUAL_CTL1 (0x5B) = 0x80  we also try with 0x81 but it doesn't change
    FPD3_TX_MODE = 000 : Auto-Detect FPD-Link III mode or 001 :Forced Single FPD-Link III Transmitter mode we try both
    FPD3_COAX_MODE = 1 : Coax
    We also try with DISABLE_DSI = 1 and activate it after
    Alexandre
  • 0 in reply to alexandre lazareff
    TI__Mastermind 25955 points

    Hi Alexandre,

    Thank you for the data.  Due to current loading, please expect an update on Tuesday.

    Sincerely,
    Bryan Kahler

  • 0 in reply to Bryan Kahler
    Intellectual 490 points

    Hi Bryan,

    Thanks for your support, we finally manage to have a full display image. The problems comes from the Microcontroller module.

    Now, we have an other problem. 

    When we check the I2C (i2cdetect on Linux) of the deserialiser through the serialiser we observe some flickering on the display. Do i need to create a new topic on the forum ?

    Best regards,

    Alexandre

  • 0 in reply to alexandre lazareff
    TI__Mastermind 25955 points

    Hi Alexandre,

    A new post would be best since its a new topic.  If you decide to make a new post, could you please include an image and describe the flickering in a bit more detail?

    Is this flickering only when transmitting i2c commands?

    Sincerely,

    Bryan Kahler