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DS90UB954-Q1: Setting the CSI-2 TX rate to 1200Mbps per lane

Part Number: DS90UB954-Q1

Hello,

Is it possible to set the CSI-2 TX rate to 1200Mbps per lane?

If I set the CSI_PLL_CTL[1:0] to "00" and use a 18MHz reference clock would that enable a 1200Mbps per lane on the MIPI?

If yes, what would be the effect on internal device timing? does it affect the I2C, back channel, etc? can you provide list of registers that needed to be changed?

Thanks and Best Regards,

Yossi