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DP83822I: How does TI recommend to use bit 11 and 12 of register 0x0010 (PHY Status Register)?

Part Number: DP83822I

Regarding TI DP83822 PHY “False carrier event” and “inverted polarity detected”

Register 0x0010 PHY Status Register (PHYSTS) bit 11 False Carrier Sense Latch and bit 12 Polarity Status.

What can cause the “false carrier event” (unplug cable during a symbol transmission?) and “inverted polarity detected” (miswiring of the Ethernet cable? Unplugging the cable?) bits to be set to 1?

 

How does TI recommend to use bit 11 and 12 of register 0x0010 (PHY Status Register)?

Should register 0x0014 (FCSCR) be read upon link up to clear the “False carrier event”?

Should register 0x001A (10BTSCR) be read upon link up (when the speed is 10 Mbps) to clear the “Polarity Status” bit?

  • Hi James,

    Your understanding of what can cause a false carrier or inverted polarity is correct. Bits 11 and 12 of register 10 will let you know if inverse polarity or a false carrier event has been detected. If a false carrier event has been detected, you may read register 14 to determine the number of false carrier events. Reading this register will then clear the number of false carrier events (the counter will restart from 0). If you re-read this register and it read 0, that means there have been no new false carrier events. Similarly reading register 1A will clear bit 4 of register 1A and bit 12 of register 10. If you read the register again and there is no inverse polarity detected, these bits will read 0. 

    It is not "required" to read these bits/registers upon link-up, but it is a good sanity check if you suspect issues.

    Thank you,

    Nikhil