This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCAN4550-Q1: request TCAN4550-Q1 schematic review

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

Dear Sir,

Could you help review the attached schematic?

  • Hello Kiyong,

    I am glad to review and provide feedback on your schematic.

    • Just as a note since it is not listed, VBB should be between 6V minimum and 24V maximum for proper operation.  It needs to be at least 6V because it needs at least 1V of dropout voltage to properly operate the internal 5V VCC LDO and internal 5V circuitry.
    • Vio must be supplied with either 3.3V or 5V that matches your digital IO signal levels.  The Vio supply also powers the crystal oscillator circuit and without a valid Vio voltage, the TCAN4550 will not work.  Currently there is only a decoupling capacitor to GND.
    • It is hard to tell what the exact value of the capacitors you have connected to the CANH and CANL pins, but it appears to be 100nF.  These capacitors are extremely large for this type of signal, and if they are used, they are typically in the 100pF range.
    • The crystal oscillator datasheet claims it needs an 8pF load capacitance for proper oscillation.  You currently have 1uF capacitors which will prevent the crystal from oscillation.  These caps should be changed to 8pF components.
    • Currently you don't have any of the interrupt capable pins connected to anything.  It is recommended to have at least one interrupt connected to the MCU so that there is less overhead on the SPI bus that will otherwise have to continually poll the device for it's current status and check for any new incoming messages.  This continuous polling could cause a significant overhead on the SPI bus.  The nINT pin is the logical OR of all interrupt events and flags.  The GPIO1 and GPO2 pins can also be setup to represent limited specific interrupt events such as the reception of a CAN message.  It is possible to operate the device without any of these pins, but it will add to the amount of SPI communication required.

    Let us know if you have any additional questions that we can help you with.

    Regards,

    Jonathan