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LMH1218: OUT1 divided by 40 clock

Part Number: LMH1218


Hello community,

We have an application using either IN0 or IN1 of LMH1218 to fanout both on OUT0 and OUT1. We need  OUT1 output clock divided by 40 (0x1C: OUT1 puts out line rate clock for 3G and below and 297 MHz clock for 5.94Gbps and 11.88Gbps) and at the same time OUT0 output the re-timed data.

Thus, there are two application scenarios:

1) using IN0 as data input,  OUT1 output a clock and OUT0 output the re-timed data;

2) using IN1 as data input,  OUT1 output a clock and OUT0 output the re-timed data.

Is this available?

  • Greetings,

    Yes this can be done.

    Input selection - IN0 or IN1 - and OUT1 clock generation are two separate functions. Once you select input - IN0 or IN1 through reg 0x31[1:0] - then you can use reg 0x1C[4]=1'b1, 0x09[5]=1'b1, and 0x1E[7:5]=3'b101 to enable OUT1 to output divide-by-40 clock.

    Regards,, Nasser