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DS90UH948-Q1: When the LVDS CONTROL REGISTER Bit 1-0 of DS90UH948-Q1 changes from 00 to 10, the ODD and Even swing amplitudes are inconsistent.

Part Number: DS90UH948-Q1

Dear All

Thanks in advance!~

As the title content, the following is a description of the problem, the detailed waveform can also refer to the attachment

We used DS90UH948-Q1 1-channel FPD-Link III input, Dual Link OpenLDI output mode.

Initially we set the LVDS CONTROL REGISTER Bit 1-0 to 00. When we want to increase the swing, we only set the LVDS CONTROL REGISTER Bit 1-0 to 10. The phenomenon shown in the figure occurs. The output of ODD & EVEN swing is not consistent.

We tried to compare various factors, but still didn't find the reason, please help to see if there are other registers that we have ignored, thank you very much~