Hello,
As part of implementation of the LMH1297 I am looking to utilize HyperLynx to verify our PCB implementation, in place of the provided stripline models, with the LMH1297 to be within specification of the SMPTE standards for return loss on the input. Also would like simulate for the s-parameters on the OUT0 link to our FPGA. In both scenarios, the goal is to achieve the s-parameters, and do not plan to utilize the IBIS-AMI models to simulate the waveforms. Hoping that I could be pointed to the correct models to use, or determine if feasible. The AMI users guide provided shows examples of a configuration for use in ADS, while some of the files in the archive either do not match or are unspecified in the user's guide.
General architectures for both simulations to be completed below and models assumed in bold and parenthesis:
1.) Input to SDI_IO±, accounting for cable but no driver. Would like to account for the SDI_IO RL network, up to the input of the Cable EQ block: Cable (known/have) --> Board BNC (known/have) --> PCB characteristics (known/have) --> SDI_IO± (assuming IO.s4p and/or rx_io.s2(4)p).
2.) OUT0± to FPGA: OUT0± (assuming OUT0.s4p) --> PCB characteristics (known/have) --> FPGA input (known/have).
Thanks,
Joe
