TCAN4550: CAN error occurs at high bitrate

user6087658

Prodigy 30 points

Part Number: TCAN4550

Hi team

I'm working on i.MX8 based custom board.
TCAN4550 is implemented on the spi bus.

Our custom board have two spi bus and two TCAN4550 Respectively.

After porting Linux driver tcan4x5x,
I'm conducting loopback test by connecting each CANH and CANL of two chips.

However, the behavior is different depending on the CAN bitrate.

Loopback is possible without any problem up to around 200kbps.

root@localhost:~# ip link set can1 type can bitrate 200000
root@localhost:~# ip link set can1 up
root@localhost:~# candump -d -x -e -a any,0:0,#FFFFFFFF &
[1] 3733
root@localhost:~# ip link set can0 type can bitrate 200000
root@localhost:~# ip link set can0 up
root@localhost:~#
root@localhost:~# cansend can0 123#45
can0 TX - - 123 [1] 45 'E'
can1 RX - - 123 [1] 45 'E'

But, if it exceeds 300kbps, it seems that an error occurs from CAN BUS.

root@localhost:~# ip link set can1 type can bitrate 300000
root@localhost:~# ip link set can1 up
root@localhost:~# candump -d -x -e -a any,0:0,#FFFFFFFF &
[1] 3696
root@localhost:~# ip link set can0 type can bitrate 300000
root@localhost:~# ip link set can0 up
root@localhost:~#
root@localhost:~# cansend can0 123#45
can1 RX - - 20000004 [8] 00 10 00 00 00 00 00 7F ERRORFRAME
controller-problem{rx-error-passive}
error-counter-tx-rx{{0}{127}}
can0 RX - - 20000004 [8] 00 10 00 00 00 00 00 7F ERRORFRAME
controller-problem{rx-error-passive}
error-counter-tx-rx{{0}{127}}

In the case of 200kbps / 300kbps, we compared the SPI Read/Write sequence just before sending can message,

all were the same except for NBTP Register(0x101c).

200kbps: 0x00090f02
300kbps: 0x00060e02

In addition, we analyzed and compared SPI communication with Logic Analyzer,

SPI data was fine. By the way, SPI frequency is 1Mhz.

As a difference, After sending CAN Message and receive interrupts,
Interrupt register(0x1050) value has changed.

200kbps : 0x00005800 : Okay

300kbps : 0x09000000 : PEA | EW

In addition, when analyzing and comparing CAN communication with Logic Analyzer,
Normal at 200 kbps.

At 300 kbps, abnormal data was transmitted.

・Could you tell me the tcan455x conditions that transmitted abnormal data such as above?
・What Interrupt register errors point to and when do they occur in loopback environment?

I think this is not SPI bus problem between MCU <=> TCAN4550 , but TCAN4550/CAN bus problem.

over 4 years ago

0 Jonathan Nerger over 4 years ago

TI__Mastermind 24750 points

Hello,

Thank you for your interest in the TCAN4550. You have given me a lot of information here that I am working to understand so that I can support you. I have a few additional questions.

What is the system clock frequency? The data rate is dependent on the timing parameters configured in the NBTP register 0x101C. Thank you for providing the value of this register for both data rates. I've tried to work out the System Clock frequency based on the register values, but I'm not getting matching results for both the 200kbps and 300kbps rates. Since each bit period is made of an integer value of time quanta (1 tq for sync + NTSEG1 + NTSEG2), I should simply be able to add them up, multiply this number by the Nominal Bit Rate Prescaler (NBRP) to yield the System clock frequency.

For the 200kbps case, you have:

NTSEG1 = 0x0F --> 15 (interpreted as 16)

NTSEG2 = 0x02 --> 2 (interpreted as 3)

NBRP = 0x09 --> 9 (interpreted as 9)

Therefore 1tq + 16tq + 3tq = 20tq per bit.

After multiplying by 9 I get a 37.8Mhz clock frequency, which sounds like a legitimate crystal frequency you might use with a Linux based system.

However for the 300kbps case you have:

NTSEG1 = 0x0E --> 14 (interpreted as 15)

NTSEG2 = 0x02 --> 2 (interpreted as 3)

NBRP = 0x06 --> 9 (interpreted as 6)

Therefore 1tq + 15tq + 3tq = 19tq per bit.

After multiplying by 9 I get a 34.2Mhz clock frequency, which sounds like a legitimate crystal frequency you might use with a Linux based system.

Since these two clock rates do not match but you have to be using the same system clock frequency, I know that the bit rates are not 200kbps and 300kbps. At least one of them is incorrect and I want to make sure I have an accurate understanding of the system and the exact frequencies used.

I am also assuming that you are not using CANFD because you have only referenced the Classical CAN configuration. Can you confirm my assumption is correct? Can you provide me the value of register 0x1018 as well?

Regarding the error bits you are receiving in the 0x1050 status register, Bit 27 PEA is the Protocol Error in Arbitration phase. This means that it detected an error in the transmitted, received bits and that the expected values were incorrect per the CAN protocol. Therefore it has flagged this as an error.

Bit 24 EW is the Warning Status register and that indicates that the error counter has exceeded the "warning" level threshold to set this flag. The controller keeps count of the errors as a way to determine the health of the bus. It also keeps track of whether the error was generated by a message it transmitted, or whether it was an error in a message transmitted from another node. If it detects that it is generating too many error packets, it will remove itself from the bus to prevent corrupting all of the other nodes on the bus which may be able to communicate error free. This could be the result of damaged hardware and is therefore a useful feature in CAN.

Since you are receiving both the PEA and EW bits, I believe this indicates that you are getting repeated errors in the Arbitration phase of the message transmission. This could indicate both an mismatch in the timing settings for between the two nodes causing the two nodes to sample the bits in the incorrect location because one node is transmitting a bit that is either faster or slower than the other node is expecting. Are both boards configured for the exact same settings? If they are, and the system clock frequency is the same for both nodes, even if the bit rate settings don't yield exact 200kbps or 300kbps, the bits between the nodes should match and be able to communicate error free, so please confirm.

Or this could indicate a problem with the signal integrity of the bits on the bus. If the signal quality is poor and there is ringing, reflections, or other non-ideal characteristics impacting the signal, the controller could be sampling the bit properly, but the sampled value could result in an incorrect value. Is it possible to use an oscilloscope to get a capture of the actual CANH and CANL signals?

Also, could you provide some information about the CAN bus physical connection for me? Are you using proper termination (120ohm termination resistance at each end of the bus)? What type of wires and how long is the connection between the two CAN boards?

So in summary, it could be timing related to improper settings, or it could be a problem with the hardware and poor signal integrity. We have been able to get error free communication with the TCAN4550 in CAN FD applications with bit rates up to 10Mbps, so 200kbps and 300kbps should be an easy accomplishment if the bus quality is good. If you can provide me as much information about all the TCAN4550 register settings and some information about the hardware connection and signal integrity of the CAN bus, I should be able to better help you narrow down the source of your problems.

Regards,

Jonathan

0 user6087658 over 4 years ago in reply to Jonathan Nerger

Prodigy 30 points

Hi Jonathan,

Thank you for your reply and great advice.

As a result of various confirmations,
The cause was that the terminating resistance was not connected.

After connecting the 100ohm terminating resistance at each end of the bus,
We confirmed that loopback can be performed without communicate error at 100 ~ 1000kbps.

> What is the system clock frequency?

A crystal oscillator (40MHz) is connected to TCAN4550: OSC1 Pin.

> At least one of them is incorrect and I want to make sure I have an accurate understanding of the system and the exact frequencies used.

Thank you for trying to confirm NBTP register.

I also inserted debug code into the linux driver and confirmed that the set value was correctly reflected in the register NBTP.

In the calculation,
I referred to [ SLLU270 May 2019 TCAN45xx Software User's Guide, 4.1 Bit Timing Setup ].

For the 200kbps case,

[ 7158.234501] tcan4x5x spi0.0: write: reg=0x0000101c, val=0x00090f02
[ 7158.234590] brp=9
[ 7158.234594] sjw=0
[ 7158.234597] tseg1=15
[ 7158.234600] tseg2=2
[ 7158.234604] reg_btp=0x00090f02

NTSEG1 = 15 (interpreted as 16)
NTSEG2 = 2 (interpreted as 3)

1+16+3 = 20 tq/bit

prescaler = NBRP = 9 (*interpreted as 10*)

40MHz / 10 = 4MHz
4MHz / 20tq/bit = 200kbps

Therefore, it was confirmed that it was 200kbps.

Anyway , thanks for giving me important notice.

Shinichiro Adachi

Interface

Interface forum

TCAN4550: CAN error occurs at high bitrate