• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 32 subscribers
  • Views 868 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TUSB2036 Crystal Oscillator stops

Scott Burton
Prodigy 230 points
Other Parts Discussed in Thread: TUSB2036

Hello Forum,

Our design has the TUSB2036 clock supplied by a 6MHz crystal oscillator. When power is applied to the chip with it held in reset, the oscillator starts up and operates as expected and it does so indefinitely provided the chip continues to be held in reset.

However, unless the upstream USB port of the TUSB2036 is connected to a host, taking the chip out of reset causes the oscillator to stop.

There's no doubt a simple explanation for this but the datasheet doesn't seem to cover it.

Any assistance would be appreciated.

Thanks,

Scott

 

 

 

  • 0
    TI__Guru* 76130 points

    Hello Scott,

     

    It is probably that your TUSB2036 is entering into suspend mode, driving high the SUSPND pin.

    If the hub is entering into suspend mode there can be several reasons:

    -> 3ms of no bus activity.

    -> Incorrect reset timing at power up.  A 1.5 to 2 ms  pulse on ~RESET terminal is recommended, the clock signal must be stable the last 60us of the reset pulse.

    -> The DP0 or DM0 terminals of the has no pull up. This will cause the host not to recognize the device.

    -> A usb device must be able to communicate with the host within 100ms, if your reset pulse is too long then this rule may be violated, and so, the usb host will ignore or supend the hub.

     

    Can you share your schematic?

    Does the host enumerate the hub and then the clock stops?  or  it never got enumerated?

    I am not clear when you say  "However, unless the upstream USB port of the TUSB2036 is connected to a host, taking the chip out of reset causes the oscillator to stop."  do you mean that in the moment you connect the upstream port the clock signal stops?

    If you don't want to post your schematic, you can send it to  elias.villegas@ti.com

    Regards.

     

     

  • 0 in reply to Elias Villegas M.
    Prodigy 230 points

    Thank you Elias.

    Based on your feedback we've confirmed that the TUSB2036 is entering suspend mode. We now understand that this is due to the upstream host not communicating with the hub within the required 3ms window. We believe that this is because, in our application, the upstream USB host actually relies on the TUSB2036 oscillator for its clock. (We have the host and hub integrated into a single product.)

    Our plan is to replace the 6MHz crystal with a 6MHz oscillator, since we already have a placeholder for such a device.  With this in mind, the datasheet indicates that

    Because most oscillators cannot be stopped while power is on, their use prohibits low-power suspend, which depends on disabling the clock.

    and

    If a 6-MHz oscillator is used, it must be stopped at a logic low whenever SUSPND is high.

    If we don't require the low-power suspend function, is it necessary for us to stop the oscillator when SUSPND is HIGH, or can we just let it run?

    Thanks,

    Scott

  • 0 in reply to Scott Burton
    TI__Guru* 76130 points

    Scott,

    The clock does not need to be stopped if low-power suspend mode is no needed.

    The device will still enter into suspend mode but it will not enter to low-power mode because the clock is still running.

    The SUSPND terminal can be left floating if it is no needed.

    Make sure you configure the hub for "external oscillator" with the MODE terminal.

     

    Regards.

    Elias V.

     

  • 0 in reply to Elias Villegas M.
    Prodigy 230 points

    That's good news Elias, but I'm a bit confused by your last statement.

    From the datasheet:

    When MODE is low, the APLL output clock is selected as the clock source to drive the internal core of the device and 6-MHz crystal or oscillator can be used.

    it appears that the MODE pin has to be LOW as long as the clock source is 6MHz, whether this is derived from a crystal or an oscillator, because the internal APLL circuitry needs to be active to generate the required 48MHz internal clock.

    It seems that the mode pin would only be pulled HIGH if the external clock source were an oscillator with a frequency of 48MHz. Only in this case would the internal APLL circuitry NOT be required to generate the 48MHz internal clock.

    Could you please confirm this for me?

    Thanks,

    Scott

     

  • 0 in reply to Scott Burton
    TI__Guru* 76130 points

    You are correct,

     

    MODE has to go low for a 6MHz clock source no matter if it comes from an oscillator or from a crystal. Good catch.

     

    Regards.

  • 0 in reply to Elias Villegas M.
    Prodigy 230 points

    Thank you for your help with this Elias!!

    Cheers,

    Scott