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DS90CR481: TX CLK out waveform

Part Number: DS90CR481


Hellow

My customer is testing the DS90CR481 and have questions about the waveform of the TX Clock out (LVDS clock).

When measured by the customer, the TX clock in shows a duty ratio of 5: 5 as shown below. The TX clock out (LVDS clock) visually shows a waveform that repeats approximately 4: 6 and 6: 4.

Is this originally a normal waveform?

Or is it dependent on the DC balaced mode?

Please Check it.

Thank you.

Best regards

From Anthony.

Ple

  • Hello Anthony,

    The TX CLKOUT should be following a repeating 4:3 duty cycle pattern as you have described. This is normal for LVDS which packs 7 bits per clock cycle. You can see this described in the datasheet figures 15 and 16. 

    Best Regards,

    Casey