There does not appear to be a specification for the latency of the back channel for the DS90UB929. Our design uses a DS90UH926 as the deserializer. Has this been measured? What about the jitter?
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There does not appear to be a specification for the latency of the back channel for the DS90UB929. Our design uses a DS90UH926 as the deserializer. Has this been measured? What about the jitter?
Hello Michael,
What latency exactly are you interested in? GPIO? I2C? Something else?
Best Regards,
Casey
Hi, Michael,
For the back channel latency between ub929 and uh926, since the back channel rate is ~5Mbps, the latency from the back channel frame is ~10us.
regards,
Steven
regarding the gpio jitter, if the back channel rate is 5Mbps, the back channel GPIO jitter is = 1/(5Mbps / 30) = 30 /5 us = 6us.
To reduce the BC gpio jitter, you can use ux94x with higher back channel rate.
best regards,
Steven
You showed the calculation for your numbers for delay and jitter. Why does 5 MHz back channel imply 10 us delay (is this based on the number of bits sent back) ? Where does the "30" come from in the jitter calculation?