DP83825I: Built-In Self-Test (BIST) sequence of operation

Hello Marco,

1) Yes, you will need to enable the generator to generate the packets and as the section describes the checker will keep count of the errors.

2) For the loopback modes you are interested in there is no hardware configuration changes necessary between them, so you may be able to write a script to do all three one after another.

Thanks,

Vibhu

1. It is true In case of received corrupted packets. But here I have a phy with a completely broken AFE stage, I think.
I notice that the counter keeps a zero value, but BISCR [11-10] will change their state from '10'b to '01'b
Is it right?

2. I've tried to run all three tests one after another with a fully functioning phy, but I obtain false results.

This is my simple script:

// Analog loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3108);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3308

// Digital loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3104);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3304

// PCS loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3102);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3302

So I modified the script this way:

// Analog loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3108);
delay_50ms();						// wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3B08

// Digital loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3104);
delay_50ms();						// wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3B04

// PCS loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3102);
delay_50ms();						// wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);		// return 0x3B02

This time it gives me correct results.

It seems like the BISCR register is double buffered, or the bits [11-10] need to be read one time to reset hardware flags and then one time to read new values.

Can you investigate, please?

Many thanks for replying.

Marco

Hi Marco,

It has to transmit some packets, establish sync and then start tracking the errors. Adding some delay from PRBS write to read the status is the correct way of using it.

Regards,

Geet

Many thanks,

but what about double reading BISCR register?

Waiting some time only between write and read is not enough to give correct results.

Regards,

Marco

Hi Marco,

That's shall not be needed.

If you experiencing on your system, can you please look from firmware/driver point of view, that it's not masking one of the command and PHY really needs probing two times for each command ?

Regards,

Geet

Hi Geet,

I've checked my code, and all seems ok.

I've repeated the test, and this is the result for both read operations:

// Analog loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3108);
delay_50ms();                       // wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3B08
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3B08

// Digital loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3104);
delay_50ms();                       // wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3F04
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3B04

// PCS loopback test
PHY_Write(base, phyAddr, PHY_BISCR_REG, 0x3102);
delay_50ms();                       // wait a small time
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3F02
PHY_Read(base, phyAddr, PHY_BISCR_REG, &reg);       // return 0x3B02

As you can notice, the first test (analog loopback) give correct result for both read operations, but in the second (digital) and third (PCS) tests the phy returns false result on the first read and correct result on the second read.

It seems like some bits need to be reset by the first BISCR read operation.

This is the MDIO line for second test (digital loopback):

Thanks in advance,

Marco

Hi,

Can you please increase the delay after writing the configuration ?

Regards,
Geet

Hi Geet,

I've increased my delay up to 1 second, but with same results.

I've launched my code in debug mode, step by step, manually waiting more than few seconds, but with same results.

Where can be the problem?

Regards,

Marco

Hi Marco,

Just to isolate the problem between driver or PHY, can you please use the USB-MDIO tool and hook the PHY to USB-MDIO and try.

Regards,

Geet

Hi Geet,

I'm sorry but I don't have USB-MDIO tools available. I'm currently working on an embedded custom board with MCU and PHY only.

But I've already posted, some messages above, the same oscilloscope acquisition of 2 BISCR subsequent reads, with MDIO bit stream exposed and decoded. I think it's enough to exclude driver errors.

If you have a PHY eval board available, why don't you try to reproduce the same behavior in that?

Regards,

Marco

Hi Marco,

We test is part of the regular test and don't see the behaviour, hence the request.

regards,
Geet