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DS90CF386: PxCLK out issue

Part Number: DS90CF386

Hi sir,

We use the DS90CF386 to convert LVDS of NXP iMX6 to RGB888 interface. IMX6 spec: https://www.nxp.com/docs/en/data-sheet/IMX6DQIEC.pdf

The frequency setting of LVDS and PCLK is 80MHz, but the frequency of PxCLK out is 133-136MH. What is wrong?

Here is schematic.SCHEMATIC1 _ LVDS BRIDGE.pdf

  • Hi Tseng,

    Please share and confirm the display timing parameters being utilized here:

    RGB888 (24 bit)

    • H_Active = ____

    • H_Blank = ____

    • V_Active = ____

    • V_Blank = ____

    • f_Vertical = _____ Hz

    Sincerely,
    Bryan Kahler

  • Hi Bryan,

    Here is setting parameters, please help to review it. Thanks a lot.

              clock-frequency = <74250000>;
                    hactive = <1280>;
                    vactive = <720>;
                    hback-porch = <220>;
                    hfront-porch = <110>;
                    vback-porch = <20>;
                    vfront-porch = <5>;
                    hsync-len = <40>;
                    vsync-len = <20>;

  • Hi Bryan,

    We add 100 ohm termination resistors in data and clk pairs, the DS90CF386 works normally. 

    BR,

    Roger

  • Hi Roger,

    Good to hear.  Please make sure the termination resistors are located close to the RX inputs (unless fly-by termination is being utilized).

    In addition to the termination resistors on the RxINn+/- and RxCLKIN+/-, please also check the power rails to ensure that noise on Vcc does not exceed 100 mVpp.

    Here is a good document that describes generalized pcb recommendations for lvds:http://www.ti.com/lit/an/snla002/snla002.pdf

    It may be helpful to take a quick pass over the layout to ensure it conforms to the recommendations given in the document listed above.

    Sincerely,
    Bryan Kahler