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LMH1228: Sending 32bit data through SPI

Takahiro Saito
Expert 5395 points
Part Number: LMH1228
Other Parts Discussed in Thread: SIGCONARCHITECT

Hello team,

IP core in customer's FPGA only can handle 32bit length data for SPI, not 17bit length.

If R/W bit, address and data are put on last 17bits like below, can LMH1228 communicate properly with processor?

SS_N is pulled LOW before sending 32bit data and pulled high just after end the 32bit data.

Regards,

Saito

  • 0
    TI__Guru* 93670 points

    Hi Saito-San,

    LMH1228 or 12G devices SPI interface internally has 17-bits shift register. What is important is the last 17-bits when writing into the register or before SSNbar becomes inactive. On the other hand, when reading the register the first 17-bits are LMH1228 register content - when SSNbar becomse active.Please note i personally prefer SMBus interface versus SPI interface. This is mainly because with SMBus interface we can use SigconArchitect GUI to control the device - this would help during product development and debugging. If SMBus interface is not available, then SPI interface should be fine as well.

    Regards,, nasser

  • 0 in reply to Nasser Mohammadi
    TI__Expert 5395 points

    Hi Nasser-san,

    Thanks. Customer can set the address and data last 17bits in 32 bit data sequence.

    I understood the customer's SPI 32bit transfer should work if they set the address and data to last 17 bit when they writing into register.

    Regards,

    Saito