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DP83822EVM: RMII interface

Toshihiro Watanabe
Genius 10235 points
Part Number: DP83822EVM

Hello,

The customer plans to test FPGA board and DP83822EVM for evaluation. RMII interface through put is 50MHz clock. The customer has concern about the connection between FPGA board and DP83822EVM.

[Questions]

1) Have TI worked DP83822EVM in RMII mode by using DP83222EVM J13 and J14 header?

2) If yes, could you share us what kind of cable and length used?

3) FPGA board header pin assign is not pair signal and gnd. This may be disturb waveform. If there is an advise for these connection , please let us know.

Best regards,

Toshihiro Watanabe

  • 0
    TI__Genius 11725 points

    Hi Toshihiro-san

    To answer your questions:

    1) We haven't tested this with an FPGA but have tested the interface over these headers to make sure it complies with RMII standards.

    2) The length of the cable on the RMII side is not characterized and not something we can guarantee. We recommend using as short a cable as possible.

    3) Not having access to ground will degrade signal quality. You must connect the gnd signal between the boards.

    Thank you,

    Nikhil