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DS125DF1610: ds125df1610

Part Number: DS125DF1610

Hi,

   please check attach file.

Thanks

cannieds125df.docx

  • Regarding: "How to setup reg 0x96 bit 5? Do 6A,6B,7A,&b all master?"

    •  Yes, for this fanout case you should configure all channels within the crosspoint to master by setting 0x96[5]=1

    Regards,

    Rodrigo Natal

    HSSC Applications Engineer


  • Hi,

      at datasheet page 17. it seem one master others are slave. If I setup all as master, does it will has any impact?

    Br,

    cannie

    The cross point switch can also be used to replicate data or perform a broadcast function. The options for this
    type of configuration include:
    • 1:2 – any channel input to any 2 channels output
    • 1:3 – any channel input to any 3 channels output
    • 1:4 – any channel input to all 4 channels output
    When the cross point switch is configured to replicate/broadcast data a master must be assigned during the
    cross point configuration. The master channel will have control over the CTLE adaption. All of the slave channels
    will be able to adapt their own DFE, but will not have control to adapt the CTLE. In this type of configuration there
    must be 1 channel assigned as a master. All other channels in the broadcast network must be assigned as
    slaves. There cannot be more than one master channel in a broadcast network. In a broadcast configuration, the
    straight through path connecting the broadcasting input to its own output needs to be enabled and set to have

  • Hi,

    Setting all channels to master will not have any negative impact, as this is our recommended setting as called out in the datasheet register table (see below.) My apologies for the confusion. The slave option is no longer supported. 

    Address

    (Hex)

    Bits

    Default Value (Hex)

    Mode

    EEPROM

    Field Name

    Description

    96

    7

    0

    RW

    N

    RESERVED

    6

    0

    RW

    N

    RESERVED

    5

    0

    RW

    Y

    XPNT_SLAVE

    Always configure this bit to be master. Master control is assigned by mux selection

    1: Channel is a slave

    0: Channel is a master

    (recommended)

    4

    0

    RW

    Y

    XPNT_EN

    1: Cross Point is enabled

    0: Cross Point is disabled

    3

    0

    RW

    Y

    EQ_BUFFER_EN[1]

    Enable EQ output buffers:

    00: Neither buffer in ON (not recommended)

    01: Only local buffer is ON

    10: Only multi-drive buffer is

    ON

    11: Both buffers are ON

    2

    1

    RW

    Y

    EQ_BUFFER_EN[0]

    1

    0

    RW

    Y

    EQ_DATA_MUX_IN[1]

    Select EQ data and signal detect bus from one channel:

    00: channel A

    01: Channel B

    10: Channel C

    11: Channel D Channel A = 0,4,8,12

    Channel B = 1,5,9,13

    Channel C = 2,6,10,14

    Channel D = 3,7,11,15

    0

    0

    RW

    Y

    EQ_DATA_MUX_IN[0]