Hi Team,
My customer is evaluating the DP83867IR on their board.
Regarding the 10Base-T compliance test, they refer "8.4.6.8 IEEE 802.3 Test Modes" on page 46 of datasheet, and refer application report "How to Configure DP838xx for Ethernet Compliance Testing (SNLA239A).
They could do output 10Base-T LinkPuls.
Next, it is necessary to output pseudo random and ALL1 signal in 10Base-T compliance test.
Application report (snla239a) is a system that outputs a test pattern from a Link partner and reverse loops back the PHY.
When they checking with the external site for compliance testing, although it was possible to incorporate a link partner into the test system, it was found that return loss measurement was not possible.
They added a function to output test patterns to FPGA, but the DP83867IR does not seem to output signals to MDI unless linked up.
Q: Is there a setting that the DP83867IR can output signal to MDI even when the link is down?
Thank you.
Best Regards,
Koshi Ninomiya
