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DS90UB933-Q1: Extra spikes on LineValid or FrameValid

Part Number: DS90UB933-Q1


Hello

we are debugging our board with composed by a camera sensor (ONSemi MT9P031), a FPDLINK serializer (ds90ub933) and a FPDLINK deserialiser (DS90UB934). Setups:

- Sensor: 960x960 pixels, 48MHz clock out, data outgoing on rising edge of PXCLK.

- Serializer: MODE: ExternalClock, GPO(3)/CLKIN: 32 MHz clock. REG0x03: 0xC4. REG 0x05: 0x18

On deserializer side we notice that there are some "extras" edges after LV or FV rising or falling edges, like if the serializer samples ringings on signals (but they aren't).

What could we check?

Thanks for help.

  • Hi Fabio,

    Have you tried running BIST to check if the ser and des link is working as expected?

    Also, you are sending data on the rising edge but the pixel clock edge select on the 933 is set for the falling edge 0x03[0]=0, can you try updating this so 0x03[0] = 1

    Regards,
    Mandeep Singh