DS90UB953-Q1: CSI2 Non-Continuous Clock and Continuous clock

Takuma Ito

Hello

Due to some reason, I need to configure the 953's clock lane to Non-Continuous, but actually CSI2 source (FPGA) is operating in continuous clock mode. Is there any issue with this setting mismatch? It seems 953 receives the image correctly though.

over 6 years ago

0 Nicholas Darash over 6 years ago

TI__Mastermind 18755 points

Hello,

Can I ask what the reason is that you would need to mismatch the clock modes? Also I would suggest checking registers 0x5C and 0x5D in the 953 to see if the mismatch is causing any CSI errors to occur. In the case that errors are occurring I would say that it is not going to work long term.

Regards,

Nick

0 Takuma Ito over 6 years ago in reply to Nicholas Darash

TI__Expert 5200 points

Hi Nick

The final product uses Non-continuous clock setting in 953 and Imager so it matches, but in production test, we will use FPGA instead of Imager. The FPGA doesn't support Non-Continuous clock , so I am using Continuous clock instead.

I can check the error and it seems ok but Can you check if this is actually ok from how D-Phy works point of view?

0 Nicholas Darash over 6 years ago in reply to Takuma Ito

TI__Mastermind 18755 points

Hi Ito,

As far as whether or not this will work is hard to say, it is not something that has been tested for and validated and therefore I cannot say for certain that it will work. I would suggest running in continuous clock mode until such a time that the system can be tested with a non-continuous clock.

Regards,

Nick

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DS90UB953-Q1: CSI2 Non-Continuous Clock and Continuous clock