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DP83822I: Software issue

Part Number: DP83822I

Hi  Experts:

I met an issue when test ethernet with 10/100M PHY DP83822IRHB.

  1. There are three PHYs separately  connected to three  GEMs of the CPU via RGMII.The All the PHYs share the same MDC/MDIO serial management interface.
  2. It is failed to read phy address for ETH0 and ETH1 whiling using lwip echo server test which looks up phy address from 31 to 0.
  3. It is failed to read phy register when I set the phy address to 0x1 or 0x3 in SW.

I’m not sure what happens during phy read operation. Is there any other action should I take before phy setup?

 

Table 1 ETH info.

ETH

GEM

Interface

PHY

PHY ADDR

test OK?

ETH0

GEM0

RGMII1

10/100/1000M PHY

0x0

Ping success, PHY read OK

ETH1

GEM1

RGMII2

10/100M PHY

0x1

PHY read NOK

ETH2

GEM2

RGMII3

10/100M PHY

0x3

  • Hi Jason,

    Please let us know the following to debug this further:

    1. Other than 3 822 phys of target address 0x01, 0x02, 0x03, are there other devices also connected to the MDC/MDIO bus?

    2. What is the MDC clock frequency? Is it running continuously or does it shut down after read or write operation?

    3. What is the strap resistance connected for phy id 0x02 and 0x03?

    --

    Regards,

    Vikram

  • Hi  Vikram:

    Thanks for your reply. Please see my answer according to the questions:

    1.  No other devices are connected to the MDC/MDIO bus.

    • Just as mentioned in the following table , the phy address of three device is 0x0, 0x1 and 0x3. The 0x2 is not used.
    • The phy device with address 0x0 is 88E1518 which is 10/100/1000M supported, the other two device are 10/100M PHY DP83822IRHB.

    2.   fMDC≈1/(2.26us)=454KHz according to the Oscilloscope. It is smaller than the fmax (25MHz) and also smaller than the typical frequency(2.5MHZ). It is NOT continuous.

    3.   For phy id 0x1, no external strap resistor is added . For phy id 0x3, a RH=2.49K is added to set the phy_addr[1] as ‘1’

  • Hi Vikram:

    Is there any update ?  Thanks!

  • Hi Jason,

    Can we ask for the experiment in which we remove the other vendor's phy from MDC/MDIO lines (ETH0) and check if TI phys starts responding?

    Just want to make sure that other device is somehow not holding the lines.

    --

    Regards,

    Vikram

  • Hi  Vikram:

    There are other TI's PHY on the board , but only these three DP83822 on this  line , no other PHY.

  • Hi Jason,

    Sorry I may have misunderstood. But according to your previous message (pasted below), I inferred that there are 3 devices on shared mdc/mdio line :

    1. 88E1518 with phy address 0x0

    2. 822 with phy address 0x1

    3. 822 with phy address 0x3

    • Just as mentioned in the following table , the phy address of three device is 0x0, 0x1 and 0x3. The 0x2 is not used.
    • The phy device with address 0x0 is 88E1518 which is 10/100/1000M supported, the other two device are 10/100M PHY DP83822IRHB

    Is this inference correct? Sorry for the confusion.

    --

    Regards,

    Vikram

  • Hi  Vikram:

    Shall we move to the discussion by e-mail because something related to the customer's confidential. ?