Team,
How should the thermal pad of the package be soldered to the PCB? To a simple floating pad, or should it get connected to GND?
I found the following in www.ti.com/lit/slua271, but this is still not 100% clear:
3.4 Exposed Pad PCB Design
The construction of the exposed pad enables enhanced thermal and electrical characteristics. To take full
advantage of this feature, the pad must be physically connected to the PCB substrate with solder. The
published data for thermal performance, θJA, is based on a four-layer PCB incorporating vias that act as
the thermal path to the layers, also known as a JEDEC High K board design per JESD51-7.
The dimensions of the thermal pad on the PCB should be equal to the exposed pad on the QFN and
SON. Adequate clearance (CPL) is necessary to prevent solder bridging. Experiments have concluded
that a minimum clearance of 0,2 mm is satisfactory for most designs.
Thanks,
Robert
